SNLA267A March   2019  – June 2019 DS90UB953-Q1 , DS90UB954-Q1 , DS90UB960-Q1

 

  1.   How to Design a FPD-Link III System Using DS90UB953-Q1 and DS90UB954-Q1
    1.     Trademarks
    2. 1 Overview
      1. 1.1 System Level Functionality
    3. 2 Basic Design Rules
      1. 2.1 IDX and MODE Pin Verification
        1. 2.1.1 REF Clock, CLK IN, AON and Frequency Selection
          1. 2.1.1.1 Synchronous Mode
          2. 2.1.1.2 Non-Synchronous CLK_IN Mode
          3. 2.1.1.3 Non-Synchronous AON Mode
          4. 2.1.1.4 CSI Throughput
          5. 2.1.1.5 Clocking and Frequency Selection Example
      2. 2.2 Successful I2C Communication With 953 and 954
        1. 2.2.1 Aliasing
        2. 2.2.2 Port Selection on 954
      3. 2.3 I2C Passthrough Verification
      4. 2.4 Basic Diagnostic and Error Registers
    4. 3 Designing the Link Between SER and DES
      1. 3.1 Back Channel Configuration
      2. 3.2 BIST
        1. 3.2.1 BIST Configuration and Status
        2. 3.2.2 BIST Procedure
        3. 3.2.3 List of Registers Used in BIST Script
      3. 3.3 AEQ
      4. 3.4 CML Out
    5. 4 Designing Link Between SER and Image Sensor
      1. 4.1 Sensor Initialization Using SER GPIOs
      2. 4.2 CLKOUT
    6. 5 Designing Link Between DES and ISP
      1. 5.1 Frame Sync
        1. 5.1.1 Using SER GPIOs From the DES
        2. 5.1.2 Internal and External Frame Sync Configuration
        3. 5.1.3 Tables for Using GPIOs and Frame Sync
      2. 5.2 Port Forwarding
      3. 5.3 Pattern Generation
        1. 5.3.1 Accessing Indirect Registers
        2. 5.3.2 Pattern Generation From DES to ISP and SER to DES
    7. 6 Hardware Design
      1. 6.1 Basic I2C Connectors
        1. 6.1.1 I2C Pullups for SDA and SCL
      2. 6.2 AC Capacitor on FPD3 Link
      3. 6.3 Capacitance Used in Loop Filter
      4. 6.4 Critical Signal Routing
      5. 6.5 Time Domain Reflection
      6. 6.6 Return Loss and Insertion Loss
      7. 6.7 Power-over-Coax (PoC)
      8. 6.8 Voltage and Temperature Sensing
    8. 7 Appendix
      1. 7.1 Scripts
        1. 7.1.1  BIST Script
        2. 7.1.2  Example Sensor Initialization Script
        3. 7.1.3  CSI Enable and Port Forwarding Script
        4. 7.1.4  Enabling CMLOUT FPD3 RX Port 0 on 954
        5. 7.1.5  Remote Enabled SER GPIO Toggle Script
        6. 7.1.6  Local SER GPIO Toggle Script
        7. 7.1.7  Internal FrameSync on 953 GPIO1
        8. 7.1.8  External FrameSync on 953 GPIO0
        9. 7.1.9  SER GPIOs as Inputs and Output to DES GPIO
        10. 7.1.10 Pattern Generation on the 953 Script
        11. 7.1.11 Pattern Generation on the 954 Script
        12. 7.1.12 Monitor Errors for Predetermined Time Script
        13. 7.1.13 954 and 953 CSI Register Check Script
        14. 7.1.14 Time Till Lock Script on 953
      2. 7.2 Acknowledgments
  2.   Revision History

2.2.1 Aliasing

Device Alias ID refers to the alternate 7-bit address assigned to either the serializer, deserializer, or remote slave. The Device Alias can help differentiate devices that have the same Device ID or physical I2C address. TI recommends that the I2C master always use the device alias to communicate with a remote I2C slave.

For example, the DS90UB954-Q1 can support two serializers like the DS90UB953-Q1. If both serializers are 953s that house the same camera, the device IDs and default alias IDs for the corresponding devices will be the same. As a result, the best practice is to write a unique alias ID to each device. Note that these conventions only apply when the I2C passthrough is enabled. Refer to Section 2.3 on I2C passthrough for more information.

I2C addresses are always 7 bits (binary). The majority of the registers on the DS90UB95x-Q1 associated with I2C addresses uses bits [7:1] for the address, and bit 0 is either reserved or used for some other purpose. Therefore, while loading an address value to a specific register, it is always left-shifted by 1 bit. For example, 0x50 (101 0000) left-shifted by 1 bit is 0xA0 (1010 0000). This operation can be represented as, 0x50<<1 which is equal to 0xA0.

Table 7. Bit Description of SER_ALIAS_ID Register With Example

ADDR. 0x5C[7:1] 0x5C[0]
Bits 101 0000 0
Dec. Remote SER Alias ID Automatically Acknowledges I2C writes to SER

If a defined alias ID does not follow this convention, problems can arise. For example, register 0x5C on the 954 holds the SER_ALIAS_ID. If bit [0] of the 8-bit address is set to 1, transactions using this alias ID will be automatically acknowledged. As a result, the controller (or master) sends the slave address and does not listen for a response from the slave when communicating with the serializer on the bus. All writes are attempted regardless of the forward channel lock state or status of the remote Serializer Acknowledge. This can be problematic when validating the link between the SER and DES.