SNLA431 January   2024 DP83TC812R-Q1 , DP83TC812S-Q1

 

  1.   1
  2.   Trademarks
  3. 1Preface
  4.   Notational Conventions
  5. 2Related Documentation
  6. 3Support Resources
  7. 4Troubleshooting the PHY Application
    1. 4.1  Schematic and Layout Checklist
    2. 4.2  Verify Successful Power-up of PHY
    3. 4.3  Peripheral Pin Checks
      1. 4.3.1 Probe the RESET_N pin
      2. 4.3.2 Probe the INH pin
      3. 4.3.3 Probe the CLKOUT pin
      4. 4.3.4 Probe the Serial Management Interface (MDC, MDIO) Pins
    4. 4.4  Register Dump Comparison
    5. 4.5  Verifying Strap Configurations
    6. 4.6  Check the MDI Signal
    7. 4.7  Link Up Failed Common Issues
    8. 4.8  Signal Quality Check
    9. 4.9  Power Up Timing
    10. 4.10 Loopback Testing
    11. 4.11 Debugging the MAC Interface
    12. 4.12 Verify Open Alliance PMA Compliance
    13. 4.13 Tools and References
      1. 4.13.1 DP83TC812 Register Access
      2. 4.13.2 DP83TC812 USB2MDIO Scripts
      3. 4.13.3 Extended Register Access
      4. 4.13.4 Software and Driver Debug on Linux
        1. 4.13.4.1 Commonly Seen Linux Terminal Outputs
  8. 5Conclusion

4.12 Verify Open Alliance PMA Compliance

The IEEE802.3bw standard specifies several electrical tests to maintain proper transmitter electrical specifications of 100Base-T1 PHYs. These tests can be used to confirm the components and layout of a design are meeting requirements and not affecting the signal quality. See SNLA389 for more details on performing these tests. Note the script given in SNLA389 must be written at all times during regular operation of the PHY, not just for compliance testing.

For designs with link issues or CRC errors determined to be stemming from the MDI, performing these compliance tests can give additional insight on the issue. For example, a design failing the PSD test can point to the MDI traces being very long and having increased insertion loss. A design failing the jitter test can point to cross talk from nearby switching signals. Please refer to the DP83TC812 Schematic Checklist for recommended layout rules.

Most oscilloscope vendors have software and fixtures to run the 100Base-T1 PMA compliance tests. One such option can be found here. Below is a list of PMA compliance tests, and corresponding PHY test modes required.

Table 4-11 100Base-T1 PMA Compliance Tests

PMA Compliance Test

Required PHY Test Mode

Transmitter Output Droop

Test Mode 1

Transmitter Clock Frequency

Test Mode 2

Transmitter Timing Jitter

Test Mode 2

Transmitter Distortion

Test Mode 4

Peak Differential Output

Test Mode 5

Transmitter Power Spectral Density (PSD)

Test Mode 5

MDI Return Loss

n/a

MDI Mode Conversion

n/a