SNLA473 November   2024 DP83867CS , DP83867E , DP83867IS , DP83869HM , DP83TC811S-Q1 , DP83TC812S-Q1 , DP83TC813S-Q1 , DP83TC814S-Q1 , DP83TC817S-Q1 , DP83TC818S-Q1 , DP83TG720S-Q1 , DP83TG721S-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Troubleshooting the MAC Interface - SGMII
    1. 1.1 Verify Bootstrap Configurations
      1. 1.1.1 SGMII Bootstrap Configuration for DP83TG720S-Q1
    2. 1.2 Read and Check Register Values
    3. 1.3 Auto-Negotiation
    4. 1.4 Throughput and Loopback Testing
      1. 1.4.1 Bidirectional Throughput Testing
      2. 1.4.2 RX and TX Throughput Testing
      3. 1.4.3 RX and TX Throughput Testing with Fixed Number of Packets
      4. 1.4.4 Loopback Testing
        1. 1.4.4.1 MII Loopback
        2. 1.4.4.2 Reverse Loopback
    5. 1.5 Check the Clock Signal
    6. 1.6 Measure the SGMII Eye
      1. 1.6.1 SGMII Eye Mask Requirements
    7. 1.7 SGMII Layout
  5. 2Summary
  6. 3References

1.6.1 SGMII Eye Mask Requirements

To measure the SGMII output of the PHY, use an oscilloscope to measure near the input pins.

The input to the TX_M and TX_P pins on the PHY needs to follow the minimum requirements shown in Figure 1-13.

SGMII Eye Mask Input Requirement Figure 1-13 SGMII Eye Mask Input Requirement

Section 1.6.1 is a sample eye measured against the input requirement, with the y-axis measured in millivolts and the x-axis measured in ns. Since the mask fits in this eye, the mask meets SGMII input requirements.

SGMII Example Simulation Figure 1-14 SGMII Example Simulation

If the PHY SGMII input does not meet the requirements shown above, there can be some issues with the layout. See Section 1.7 for more details. The PHY SGMII output can also be adjusted with the VOD swing registers.

For example, these settings can be changed by toggling bits 13 and 14 of register 0x428 in the DP83TG720S-Q1.

Table 1-5 DP83TG720S-Q1: 428h Output Swing Settings
Bits 14-13 Register Value SGMII Output Swing Unit
00b 0x0002 1000 mV
01b 0x2002 1260 mV
10b 0x4002 900 mV
11b 0x6002 720 mV