The DP83867 device is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols. Optimized for ESD protection, the DP83867 exceeds 8kV IEC 61000-4-2 (direct contact).
The DP83867 is designed for easy implementation of 10/100/1000Mbps Ethernet LANs. DP83867 interfaces directly to twisted pair media through an external transformer. This device interfaces directly to the MAC layer through Reduced GMII (RGMII) or embedded clock Serial GMII (SGMII).
The DP83867 provides precision clock synchronization, including a synchronous Ethernet clock output. DP83867 has low latency and provides IEEE 1588 Start of Frame Detection.
Designed for low power, the DP83867 consumes only 457mW under full operating power. Wake-on-LAN can be used to lower system power consumption.
For additional terms or required resources, click any title below to view the detail page where available.
The AWR2944 evaluation module (EVM) is an easy-to-use platform for evaluating the AWR2944 mmWave system-on-chip (SoC) radar sensor, which has direct connectivity to the DCA1000EVM (sold separately).
The AWR2944EVM kit contains everything required to start developing software for the on-chip C66x (...)
The DP83867ERGZ-R-EVM supports 1000/100/10BASE and is compliant with the IEEE 802.3 standard. This reference design supports the RGMII MAC interface.
The DP83867ERGZ-R-EVM evaluation module (EVM) for the DP83867 device includes 3 on-board status LEDs and 5-V connectors with (...)
The DP83867ERGZ-S-EVM supports 1000/100/10BASE and is compliant with the IEEE 802.3 standard. This reference design supports SGMII MAC interface.
The DP83867 EVM includes three onboard status LEDs, 5V connectors with onboard LDOs, and is JTAG accessible. The DP83867 EVM is capable of providing a (...)
The ASPEED Ethernet PHY EVM is a daughter card intended to connect to ASPEED’s AST2600 evaluation board (EVB) to show how the DP83867 and DP83869 Ethernet PHYs can be used in a board management controller (BMC) system. The EVM contains four PHYs each capable of 10/100/1000Mbps data rate.
The drivers for Texas Instruments' Ethernet physical layer (PHY) transceivers support communication through the serial management interface (MDC/MDIO) to configure and read PHY registers. Linux and RTOS drivers can be found on our github.
The USB-2-MDIO software tool lets Texas Instruments' Ethernet PHYs access the MDIO status and device control registers. The USB-2-MDIO tool includes a LaunchPad™ Development kit for TI's MSP430™ MCUs that is interfaced with a lightweight GUI. The (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RGZ) | 48 | Ultra Librarian |
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.
Debug Interface for Ethernet PHYs (DIEP) GUI Installer
Release of DIEP GUI installer, packaged with device description files for automatic connection and detection of Ethernet EVMs.
After installation, start program with .exe in the following directory:
C:\Program Files (x86)\Texas Instruments\DIEP\DIEP.exe
REDRAFT 12-11:
No changes to DIEP, only adding reference to associated PHY & EVM GPNs.