The DS320PR412, DS320PR421, SN75LVPE5412 and SN75LVPE5421 internal registers can be accessed through standard SMBus protocol. The DS320PR412, DS320PR421, SN75LVPE5412 and SN75LVPE5421 features two banks of channels, Bank 0 (Channels 0-1) and Bank 1 (Channels 2-3), each featuring a separate register set and requiring a unique SMBus slave address. The SMBus slave address pairs (one for each channel bank) are determined at power up based on the configuration of the MODE and EQ0/ADDR pins. The pin state is read on power up, after the internal power-on reset signal is deasserted.

There are 8 unique SMBus slave address pairs (one address for each channel bank) that can be assigned to the device by placing external resistor straps on the MODE and EQ0/ADDR pins as shown in Table 2-3. When multiple DS320PR412, DS320PR421, SN75LVPE5412 and SN75LVPE5421 devices are on the same SMBus interface bus, each channel bank of each device must be configured with a unique SMBus slave address pair.