SNLU301 November   2021 SN75LVPE5412 , SN75LVPE5421

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  3. 2Description
    1. 2.1  Redriver-Mux 5-Level I/O Control Inputs
    2. 2.2  Redriver-Mux Modes of Operation
    3. 2.3  Redriver-Mux SMBus or I2C Register Control Interface
    4. 2.4  Redriver-Mux Equalization Control
    5. 2.5  Redriver-Mux RX Detect State Machine
    6. 2.6  Redriver-Mux DC Gain Control
    7. 2.7  DS320PR412-421EVM Global Controls
    8. 2.8  DS320PR412-421EVM Downstream Devices Control
    9. 2.9  DS320PR412-421EVM Upstream Devices Control
    10. 2.10 Quick-Start Guide (Pin Mode)
    11. 2.11 Quick-Start Guide (SMBus Slave Mode)
  4. 3Schematics
  5. 4PCB Layouts
  6. 5Bill of Materials

2.5 Redriver-Mux RX Detect State Machine

Each DS320PR412, DS320PR421, SN75LVPE5412 and SN75LVPE5421 deploys an RX Detect state machine that governs the RX detection cycle as defined in the PCI Express specification. At power up or after a manually triggered event, the redriver determines whether or not a valid PCI Express termination is present at the far end of the link. The RX_DET/SCL pin of DS320PR412, DS320PR421, SN75LVPE5412 and SN75LVPE5421 provides additional flexibility to system designers to appropriately set the device in their desired mode, according to Table 2-5.

Table 2-5 Rx Detect Control Pin Settings
PD PIN LEVELRX_DET PIN LEVELDESCRIPTION
LL0PCI Express RX detection state machine is disabled. Recommended for non-PCI Express use cases. Inputs are always 50 Ω.
LL1Outputs poll until three consecutive valid detections.
LL2Outputs poll until two consecutive valid detections.
LL3Reserved.
LL4TX polls every ~150us until valid termination is detected. Recommended Default setting for PCIe.
HXManual reset, inputs are Hi-Z