SNOSAS1B November   2010  – September 2025 LMD18200QML

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Diagram
  6. 5 Absolute Maximum Ratings
  7. 6 Operating Ratings
  8. 7 Quality Conformance Inspection
  9. 8 LMD18200 Electrical Characteristics DC Parameters
  10. 9 Typical Performance Characteristics
  11. 10Test Circuit
    1. 10.1 Switching Time Definitions
  12. 11Pinout Description
    1. 11.1 Application Information
      1. 11.1.1 TYPES OF PWM SIGNALS
      2. 11.1.2 SIGNAL TRANSITION REQUIREMENTS
      3. 11.1.3 USING THE CURRENT SENSE OUTPUT
      4. 11.1.4 USING THE THERMAL WARNING FLAG
      5. 11.1.5 SUPPLY BYPASSING
      6. 11.1.6 CURRENT LIMITING
      7. 11.1.7 INTERNAL CHARGE PUMP AND USE OF BOOTSTRAP CAPACITORS
      8. 11.1.8 INTERNAL PROTECTION DIODES
    2. 11.2 Typical Applications
      1. 11.2.1 FIXED OFF-TIME CONTROL
      2. 11.2.2 TORQUE REGULATION
      3. 11.2.3 VELOCITY REGULATION
  13. 12Revision History

Pinout Description

(See 24-Lead Dual-in-Line Package Top View See Package NAZ0024B)

Pin 1, BOOTSTRAP 1 Input: Bootstrap capacitor pin for half H-bridge number 1. The recommended capacitor (10 nF) is connected between pins 1 and 2.

Pin 2, OUTPUT 1: Half H-bridge number 1 output.

Pin 3, DIRECTION Input: See Table 11-1. This input controls the direction of current flow between OUTPUT 1 and OUTPUT 2 (pins 2 and 10) and, therefore, the direction of rotation of a motor load.

Pin 4, BRAKE Input: See Table 11-1. This input is used to brake a motor by effectively shorting its terminals. When braking is desired, this input is taken to a logic high level and it is also necessary to apply logic high to PWM input, pin 5. The drivers that short the motor are determined by the logic level at the DIRECTION input (Pin 3): with Pin 3 logic high, both current sourcing output transistors are ON; with Pin 3 logic low, both current sinking output transistors are ON. All output transistors can be turned OFF by applying a logic high to Pin 4 and a logic low to PWM input Pin 5; in this case only a small bias current (approximately −1.5 mA) exists at each output pin.

Pin 5, PWM Input: See Table 11-1. How this input (and DIRECTION input, Pin 3) is used is determined by the format of the PWM Signal.

Pin 6, VS Power Supply

Pin 7, GROUND Connection: This pin is the ground return, and is internally connected to the mounting tab.

Pin 8, CURRENT SENSE Output: This pin provides the sourcing current sensing output signal, which is typically 377 μA/A.

Pin 9, THERMAL FLAG Output: This pin provides the thermal warning flag output signal. Pin 9 becomes active-low at 145°C (junction temperature). However the chip will not shut itself down until 170°C is reached at the junction.

Pin 10, OUTPUT 2: Half H-bridge number 2 output.

Pin 11, BOOTSTRAP 2 Input: Bootstrap capacitor pin for Half H-bridge number 2. The recommended capacitor (10 nF) is connected between pins 10 and 11.

Table 11-1 Logic Truth Table
PWM Dir Brake Active Output Drivers
H H L Source 1, Sink 2
H L L Sink 1, Source 2
L X L Source 1, Source 2
H H H Source 1, Source 2
H L H Sink 1, Sink 2
L X H None