SNOSAV4C April   2008  – August 2026 LM7332

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
    7. 5.7 Old vs. New Die Comparison
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
      1. 6.3.1 Driving Capacitive Loads
    4. 6.4 Electrical Overstress
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Output Short Circuit Current and Dissipation Issues
  9. 8 Device and Documentation Support
    1. 8.1 Support Resources
    2. 8.2 Trademarks
    3. 8.3 Electrostatic Discharge Caution
    4. 8.4 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.2.2 Detailed Design Procedure

The LM7332 can be used as a drive amplifier for SAR ADCs as shown in Figure 7-1.

The values of Rflt and Cflt depend on the ADC specifications, as well as amplifier gain bandwidth product (GBWP) and output resistance (RO). A single ground-referenced supply voltage is also common, allowing sampling of signals up to half that voltage with low distortion.

To determine whether or not the LM7332 is a practical driver for this application, one must compare the settling time of the amplifier to the acquisition time of the ADC with Equation 1:

Equation 1. G B W P m i n ≥ 4 × N +   1 × ln ⁡ 2 ∕ 2 π × t A Q

where

  • GBWPmin: The minimum required gain bandwidth product of the drive amplifier
  • N: Number of bits in ADC
  • tAQ: The acquisition time of the ADC

Using a value of 12 bits for N and 1µs for tAQ, the GBWPmin must be greater than 5.7MHz. The LM7332 has a GBWP of 24MHz so LM7332 is indeed a practical driver for this application.

Next, determine the value of Cflt with Equation 2:

Equation 2. 20 × C S H ≤ C f l t ≤ 60 × C S H

where

  • CSH: The ADC sample and hold capacitance
  • Cflt: The external filter capacitance

Using a value of 80pF for CSH, the value of Cflt must be between 1600pF and 4800pF. The LM7332 can drive a capacitive load of 2000pF with 5VPP and settle within 1µs, therefore select 1800pF as the nearest common capacitor value within the range.

Next determine the value of Rflt with Equation 3:

Equation 3. R f l t =   40 ∕ 2 π × C f l t × G B W P m i n - R O

where

  • Rflt: The external filter resistance
  • Cflt: The external filter capacitance determined above
  • GBWPmin: The minimum required gain bandwidth product of the drive amplifier determined above
  • RO: The closed loop output impedance of the drive amplifier typically specified in the electrical characteristics table

Using a value of 1800pF for Cflt, 5.7MHz for GBWPmin, and a value of 1Ω for RO the value of Rflt is determined to be 630Ω. Use closest value of 626Ω for a filter frequency (fflt) of 141kHz given Equation 4:

Equation 4. f f l t =   1 ∕ 2 π × R O + R f l t × C f l t

The last requirement is to drive input signals of 2.5VPP on a single 5V supply with THD+N less than –80dB.

Figure 7-2 shows the THD+N response of the LM7332 with a dual supply voltage of 16V. The LM7332 can maintain THD+N levels as low as –110dB for output levels up to 4VPP. Therefore, the final requirement has been met, and the LM7332 is a practical drive amplifier for the 12-bit SAR ADC in this design example.