SNOSDL5 January   2025 LMG2652

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 GaN Power FET Switching Parameters
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 GaN Power FET Switching Capability
      2. 7.3.2 Current-Sense Emulation
      3. 7.3.3 Bootstrap Diode Function
      4. 7.3.4 Input Control Pins (EN, INL, INH, GDH)
      5. 7.3.5 INL - INH Interlock
      6. 7.3.6 AUX Supply Pin
        1. 7.3.6.1 AUX Power-On Reset
        2. 7.3.6.2 AUX Under-Voltage Lockout (UVLO)
      7. 7.3.7 BST Supply Pin
        1. 7.3.7.1 BST Power-On Reset
        2. 7.3.7.2 BST Under-Voltage Lockout (UVLO)
      8. 7.3.8 Overcurrent Protection
      9. 7.3.9 Overtemperature Protection
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 LLC Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 AHB Application
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Solder-Joint Stress Relief
        2. 8.4.1.2 Signal-Ground Connection
        3. 8.4.1.3 CS Pin Signal
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Features

  • 650V GaN power-FET half bridge
  • 140mΩ low-side and high-side GaN FETs
  • Integrated gate drivers with <100ns low propagation delays
  • Current-sense emulation with high-bandwidth and high accuracy
  • Low-side referenced (INH) and high-side referenced (GDH) high-side gate drive pins
  • Low-side (INL) / high-side (INH) gate-drive interlock
  • High-side (INH) gate-drive signal level shifter
  • Smart-switched bootstrap diode function
  • High-side start up: <8µs
  • Low-side / high-side cycle-by-cycle overcurrent protection
  • Overtemperature protection
  • AUX idle quiescent current: 250μA
  • AUX standby quiescent current: 50μA
  • BST idle quiescent current: 70μA
  • 8mm × 6mm QFN package with dual thermal pads