SNVSB66A July 2018 – October 2021 TPS3431
When VDD is greater than or equal to VDD(min) and EN is logic high, the WDO signal is determined by WDI. When WDI is within the watchdog timeout, the internal MOSFET turns off and WDO is pulled high through external pull-up resistor. When WDI is not within the watchdog timeout, the internal MOSFET turns on and WDO is pulled to logic low. When EN is logic low, ENOUT goes to logic low and WDO goes to a high-impedance state and pulls to logic high due to the external pull-up resistor.