The current mode control scheme of the TPSM656x0 device allows operation over a wide range of output capacitances. The output capacitor bank is typically limited by the load transient requirements and stability rather than the output voltage ripple. In general, higher output voltages and higher switching frequencies require less output capacitance. In addition, when using the adjustable output voltage mode, the C_FF capacitor can be used to optimize the loop performance.

In practice, the output capacitor has the most influence on the transient response and loop-phase margin. Load transient testing and Bode plots are the best way to validate any given design and must always be completed before the application goes into production. In addition to the required output capacitance, a small ceramic placed on the output can help reduce high-frequency noise. Small-case size ceramic capacitors in the range of 1nF to 100nF can be very helpful in reducing spikes on the output caused by inductor and board parasitics.

The maximum output capacitance must be limited to approximately 10 times the design value, or 1000µF, whichever is smaller. Large values of output capacitance can adversely affect the start-up behavior of the regulator as well as the loop stability. If values larger than noted here must be used, then a careful study of start-up at full load and loop stability must be performed.

This example uses an output capacitance of 70μF. Keep in mind that this value represents the value after applying D.C. bias derating and any other applicable tolerance in the capacitance. This statement is true for all the values shown in the tables. Any ceramic capacitor, or combination of capacitors, with an X7R or better dielectric, that provides 70μF at 5V bias, can be used. The values shown in the table must be considered as typical to provide a stable design. Maximum and minimum limits on the output capacitance can be found by testing the application, as mentioned above.