SNVU797D April   2022  – June 2025 LM5177

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
  6. 2Hardware
    1. 2.1 Connector, Test Point, and Selection Switch Descriptions
      1. 2.1.1 Connector Descriptions
      2. 2.1.2 Jumper Descriptions
      3. 2.1.3 Test Point Descriptions
      4. 2.1.4 Selection Switch Descriptions
        1. 2.1.4.1 S1 and S2 CFG setting
      5. 2.1.5 Current Monitor and Current Limiter Configuration
        1. 2.1.5.1 Current Monitor and Current Limiter Configuration
        2. 2.1.5.2 Current Limiter Configuration
    2. 2.2 Test Setup and Procedure
      1. 2.2.1 Test Setup
      2. 2.2.2 Test Procedure
      3. 2.2.3 Precautions
  7. 3Implementation Results
    1. 3.1 Test Data and Performance Curves
      1. 3.1.1 Thermal Performance
      2. 3.1.2 Efficiency
      3. 3.1.3 Steady State Waveforms
      4. 3.1.4 Step Load Response
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Optional Components
    3. 4.3 Board Layout
    4. 4.4 Bill of Materials
  9. 5Additional Information
    1. 5.1 Trademarks
  10. 6Revision History

S1 and S2 CFG setting

These switches enable to set the resistor for the CFG pin. Details can be found in the LM5177 Wide VIN 4 Switch Buck Boost Controller Core IP data sheet.

Table 2-4 CFG Pin Configuration Overview
#DRSSSCP – Hiccup Mode

PSM Entry Threshold

Current Limit
1DISABLEDDISABLED10%DISABLED
2ENABLED
3DISABLEDENABLED
4ENABLED
5DISABLEDDISABLED

10%

ENABLED
6ENABLED
7DISABLEDENABLED
8ENABLED
9DISABLEDDISABLED

15%

DISABLED
10ENABLED
11DISABLEDENABLED
12ENABLED
13DISABLEDDISABLED

15%

ENABLED
14ENABLED
15DISABLEDENABLED
16ENABLED
Note: Just one dip switch within S1 and S2 must be closed to avoid incorrect configuration settings.