SPRAD89 March   2023 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Use-case Considerations
  5. 3Interfacing the High Voltage Sensor
    1. 3.1 Consideration for Proper ADC Sampling
    2. 3.2 Handling High Impedance Sensor
  6. 4Performance Considerations
    1. 4.1 ADC Gain, Offset, INL & DNL
    2. 4.2 SNR Consideration
    3. 4.3 Performance Advantage
  7. 5Conclusion
  8. 6References

Introduction

TI’s Sitara™ MCU products integrate SAR ADCs in advanced small geometry CMOS process nodes. In order to optimize for low cost and high performance and avoid high cost mask sets and/or larger die area which are required to support higher supply voltages for analog, input voltage range of these ADCs is limited to 3.3 V. For many applications this range is sufficient, however some applications, especially some legacy industrial or automotive sensors, may require higher ADC input ranges like 5 V.

Depending on the application, there will be other design constraints, like the input source not being able to drive the sampling capacitor of the of the SAR ADC. Another design concern might be noise performance of the overall signal chain. This application note provides guidelines on how to approach the problem and interface different input sources with higher voltage rating than the Sitara™ MCU and the trade-offs.