SPRADR2 June   2025 AM2431 , AM2432 , AM2434 , AM623 , AM625 , AM625SIP , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM6421 , AM6422 , AM6441 , AM6442

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Tools for Arm®-based Processors
    1. 2.1 Code Composer Studio™ (CCS)
    2. 2.2 DCC ISP Tuning
    3. 2.3 DDR Margin Analysis
    4. 2.4 K3conf
    5. 2.5 OTP Keywriter
    6. 2.6 Power Estimation (PET)
    7. 2.7 Snagfactory Flashing
    8. 2.8 SysConfig
      1. 2.8.1 Clock Tree
      2. 2.8.2 DDR Config
      3. 2.8.3 Memory Configurator
      4. 2.8.4 Pinmux
      5. 2.8.5 Resource Partitioning
      6. 2.8.6 Software Configuration
    9. 2.9 UniFlash
  6. 3Summary Table
  7. 4References

DCC ISP Tuning

To obtain the best image quality for a specific raw camera module at run-time, the parameters of the Vision Preprocessing Accelerator (VPAC) need to be computed and then applied to process the raw sensor images frame by frame. To achieve this, the best VPAC parameters are typically prepared by engineers in an imaging lab under various controlled lighting conditions. These prepared parameters are then referenced and interpolated to fit the run-time lighting environment with the help of software imaging algorithms of Auto Exposure (AE), Auto White Balance (AWB), and dynamic ISP parameter control. The DCC ISP Tuning tool helps to configure these parameters.