SPRADT2 May   2025 AWRL6432

 

  1.   1
  2.   Abstract
  3. 1Introduction
  4. 2Shared Memory of AWRL6432
  5. 3Deep Sleep on AWRL6432
  6. 4Deep Sleep Implementation on AWRL6432 with Different Shared Memory Configurations
    1. 4.1 Shared Memory Mode SH_MEM_CONFIG=3
    2. 4.2 Shared Memory Mode SH_MEM_CONFIG=1
  7. 5Summary
  8. 6References

2 Shared Memory of AWRL6432

AWRL6432 contains a total of 1MB of on-chip memory. Among this memory, 512KB is dedicated to APPSS (APP subsystem), namely the Cortex-M4F (hereinafter referred to as M4F). Another 160KB resides within HWASS (HWA subsystem) and is used by HWASS (M4F can also access this memory region through the internal bus of the device). Of the remaining memory, 256KB of shared memory can be allocated either to HWASS or APPSS, while another 96KB of shared memory can be allocated either to HWASS or FECSS (Frontend Controller Subsystem), namely the RF subsystem. Details are shown in Figure 2-1. The APSSS memory addresses and HWA memory addresses differ under different shared memory modes. Please refer to Table 2-1.

Schematic Diagram of AWRL6432 Shared Memory ArchitectureFigure 2-1 Schematic Diagram of AWRL6432 Shared Memory Architecture
Table 2-1 Memory Addresses of AWRL6432 Under Different Shared Memory Modes
Shared Memory Mode

APPSS Memory Address

(Including APSPSS/HWASS Shared Memory)

HWASS Memory Address

(Default HWASS/FECSS Shared Memory Assigned to HWASS)
SH_MEM_CONFIG=0

0x00400000 - 0x0047FFFF

(512KB)

0x60000000 - 0x6007FFFF

(512KB)
SH_MEM_CONFIG=1

0x00400000 - 0x0049FFFF

(640KB)

0x60000000 - 0x6005FFFF

(384KB)
SH_MEM_CONFIG=2

0x00400000 - 0x0047FFFF

0x004A0000 - 0x004BFFFF

(640KB)

0x60000000 - 0x6005FFFF

(384KB)
SH_MEM_CONFIG=3

0x00400000 - 0x004BFFFF

(768KB)

0x60000000 - 0x6003FFFF

(256KB)

Shared memory allocation on AWRL6432 is implemented through configuration of two control registers: TOP_PRCM:HWA_PD_MEM_SHARE_REG (Address: 0x5A040500) and APP_CTRL:APPSS_SHARED_MEM_CLK_GATE (Address: 0x56060398).

Table 2-2 Control Register Values Under Different Shared Memory Modes
Shared Memory Mode

HWA_PD_MEM_SHARE_REG

Register Value

APPSS_SHARED_MEM_CLK_GATE

Register Value
SH_MEM_CONFIG=0 0x0 0x5
SH_MEM_CONFIG=1 0x7 0x6
SH_MEM_CONFIG=2 0x38 0x9
SH_MEM_CONFIG=3 0x3F 0xA