SPRUIW3 October   2021 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

  1.   Trademarks
  2. 1Feature Differences Between F28004x and F28003x
    1. 1.1 F28004x and F28003x Feature Comparison
  3. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 100-Pin PZ Package
      1. 2.1.1 100-Pin PZ Migration for Existing PCB
      2. 2.1.2 100-Pin PZ Migration for New PCB Design
    2. 2.2 PCB Hardware Changes for the 64-Pin PM Package
      1. 2.2.1 64-Pin PM Migration for New and Existing PCB
  4. 3Feature Differences for System Consideration
    1. 3.1 New Features in F28003x
      1. 3.1.1  TMU Type1
      2. 3.1.2  Fast Integer Division (FINTDIV)
      3. 3.1.3  Host Interface Controller (HIC)
      4. 3.1.4  Background CRC (BGCRC)
      5. 3.1.5  Standby Low Power Mode
      6. 3.1.6  X1 GPIO Functionality
      7. 3.1.7  Diagnostic Features (PBIST/HWBIST)
      8. 3.1.8  Advance Encryption Standard (AES)
      9. 3.1.9  Secure Boot/JTAG Lock
      10. 3.1.10 Modular Controller Area Network (MCAN)
      11. 3.1.11 Embedded Pattern Generator (EPG)
      12. 3.1.12 Live Firmware Update (LFU)
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
    5. 3.5 Other Device Changes
      1. 3.5.1 XTAL Module
      2. 3.5.2 PLL
      3. 3.5.3 PIE Channel Mapping
      4. 3.5.4 Bootrom
      5. 3.5.5 CLB and Motor Control Libraries
      6. 3.5.6 ERAD
      7. 3.5.7 GPIO
      8. 3.5.8 AGPIO
      9. 3.5.9 ERROR Status
    6. 3.6 Power Management
      1. 3.6.1 LDO/VREG
      2. 3.6.2 DCDC
      3. 3.6.3 POR/BOR
      4. 3.6.4 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
    9. 3.9 Analog Multiplexing Changes
  5. 4Application Code Migration From F28004x to F28003x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 Minimum Compiler Version Requirement for TMU Type 1
    4. 4.4 C2000Ware Examples
  6. 5Specific Use Cases Related to F28003x New Features
    1. 5.1 HIC
    2. 5.2 FINTDIV
    3. 5.3 TMU Type1
    4. 5.4 AES
    5. 5.5 MCAN
    6. 5.6 EPG
  7. 6EABI Support
    1. 6.1 Flash API
    2. 6.2 NoINIT Struct Fix (Linker Command)
    3. 6.3 Pre-Compiled Libraries
  8. 7References

3.5.3 PIE Channel Mapping

Pie channel mapping between F28004x and F28003x is different due to peripheral module changes between these devices. Table 3-7 summarizes the common and unique pie channel assignments on these two devices.

Table 3-6 Pie Channel Legend
ColorDescription
Pie channel common for both devices
Pie channel applicable only for F28004x
Pie channel applicable only for F28003x
Table 3-7 Pie Table Comparison
INTx.1INTx.2INTx.3INTx.4INTx.5INTx.6INTx.7INTx.8INTx.9INTx.10INTx.11INTx.12INTx.13INTx.14INTx.15INTx.16
INT1.yADCA1ADCB1ADCC1XINT1XINT2-TIMER0WAKE/WDOG-SYS_ERR------
INT2.yEPWM1_TZEPWM2_TZEPWM3_TZEPWM4_TZEPWM5_TZEPWM6_TZEPWM7_TZEPWM8_TZ--------
INT3.yEPWM1EPWM2EPWM3EPWM4EPWM5EPWM6EPWM7EPWM8--------
INT4.yECAP1ECAP2ECAP3ECAP4ECAP5ECAP6ECAP7---ECAP3_INT2---ECAP6_HRCALECAP7_HRCAL
INT5.yEQEP1EQEP2--CLB1CLB2CLB3CLB4SDFM1SDFM2--SDFM1DR1SDFM1DR2SDFM1DR3SDFM1DR4
INT6.ySPIA_RXSPIA_TXSPIB_RXSPIB_TX--------SDFM2DR1SDFM2DR2SDFM2DR3SDFM2DR4
INT7.yDMA_CH1DMA_CH2DMA_CH3DMA_CH4DMA_CH5DMA_CH6----FSITXA_INT1FSITXA_INT2FSIRXA_INT1FSIRXA_INT2CLAPROMCRCDCC0
INT8.yI2CAI2CA_FIFOI2CBI2CB_FIFO----LINA_0LINA_1LINB_0LINB_1PMBUSA--DCC1
INT9.ySCIA_RXSCIA_TXSCIB_RXSCIB_TXCANA_0CANA_1CANB_0CANB_1MCAN_0MCAN_1MCAN_ECCMCAN_WAKEBGCRC_CPU--HICA
INT10.yADCA_EVTADCA2ADCA3ADCA4ADCB_EVTADCB2ADCB3ADCB4ADCC_EVTADCC2ADCC3ADCC4----
INT11.yCLA1_1CLA1_2CLA1_3CLA1_4CLA1_5CLA1_6CLA1_7CLA1_8--------
INT12.yXINT3XINT4XINT5PBIST(MPOST)FMC-FPU_OVERFLOWFPU_UNDERFLOW-RAM_CORR_ERRFLASH_CORR_ERRRAM_ACC_VIOLPLLSLIPBGCRC_CLA1CLA_OVERFLOWCLA_UNDERFLOW
AES_SINTREQ