SPRUJ32 October   2022

 

  1.   C2000 F280013x Series LaunchPad Development Kit
  2.   Trademarks
  3. 1Board Overview
    1. 1.1 Kit Contents
    2. 1.2 Features
    3. 1.3 Specifications
      1. 1.3.1 External Power Supply or Accessory Requirements
    4. 1.4 Using the F280013x LaunchPad™
    5. 1.5 BoosterPack™ Plug-in Modules
    6. 1.6 Hardware Revisions
      1. 1.6.1 Revision A
  4. 2Software Development
    1. 2.1 Software Tools and Packages
    2. 2.2 F280013x LaunchPad™ Demo Program
    3. 2.3 Programming and Running Other Software on the F280013x LaunchPad™
  5. 3Hardware Description
    1. 3.1 Functional Description and Connections
      1. 3.1.1 Microcontroller
      2. 3.1.2 Power Domains
      3. 3.1.3 LEDs
      4. 3.1.4 Encoder Connectors
      5. 3.1.5 CAN
      6. 3.1.6 Boot Modes
      7. 3.1.7 BoosterPack™ Sites
      8. 3.1.8 Analog Voltage Reference Header
      9. 3.1.9 Other Headers and Jumpers
        1. 3.1.9.1 USB Isolation Block
        2. 3.1.9.2 BoosterPack™ Site 2 Power Isolation
        3. 3.1.9.3 Alternate Power
    2. 3.2 Debug Interface
      1. 3.2.1 XDS110 Debug Probe
      2. 3.2.2 XDS110 Output
      3. 3.2.3 Virtual COM Port
    3. 3.3 Alternate Routing
      1. 3.3.1 Overview
      2. 3.3.2 UART Routing
      3. 3.3.3 EQEP Routing
      4. 3.3.4 CAN Routing
      5. 3.3.5 SPI Routing
      6. 3.3.6 X1/X2 Routing
      7. 3.3.7 PWM DAC
  6. 4Board Design
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 BOM
    4. 4.4 LAUNCHXL-F2800137 Board Dimensions
  7. 5Frequently Asked Questions (FAQs)
  8. 6References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
  9. 7Revision History

SPI Routing

On the LaunchPad, one set of F2800137 SPI signals are able to be routed to either site 1 or site 2, or both sites for cases using multiple boosterpacks with the SPI. The signal connections are able to be completed by populating 0-ohm resistors on the board. By default, the resistors are populated so that the SPI signals only go to the site 1 boosterpack headers. See the SPI Routing section of the LaunchPad's schematic to see the corresponding resistor circuitry.

Table 3-6 SPI to BoosterPack Resistors
GPIO SPI Signal Resistor BP Header Connection
GPIO9 SPIA_CLK R40 J1, pin 7
R42 (DNP by default) J5, pin 47
GPIO8 SPIA_SIMO R54 J2, pin 15
R55 (DNP by default) J6, pin 55
GPIO17 SPIA_SOMI R46 J2, pin 14
R51 (DNP by default) J6, pin 54