SWRS292A December   2023  – July 2025 CC2340R5-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagram—RHB Package (Top View)
    2. 6.2 Signal Descriptions—RHB Package
    3. 6.3 Connections for Unused Pins and Modules—RHB Package
    4. 6.4 RHB Peripheral Pin Mapping
    5. 6.5 RHB Peripheral Signal Descriptions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  DCDC
    5. 7.5  Global LDO (GLDO)
    6. 7.6  Power Supply and Modules
    7. 7.7  Battery Monitor
    8. 7.8  Temperature Sensor
    9. 7.9  Power Consumption—Power Modes
    10. 7.10 Power Consumption—Radio Modes
    11. 7.11 Nonvolatile (Flash) Memory Characteristics
    12. 7.12 Thermal Resistance Characteristics
    13. 7.13 Thermal Shutdown
    14. 7.14 RF Frequency Bands
    15. 7.15 Bluetooth Low Energy—Receive (RX)
    16. 7.16 Bluetooth Low Energy—Transmit (TX)
    17. 7.17 2.4GHz RX/TX CW
    18. 7.18 Timing and Switching Characteristics
      1. 7.18.1 Reset Timing
      2. 7.18.2 Wakeup Timing
      3. 7.18.3 Clock Specifications
        1. 7.18.3.1 48MHz Crystal Oscillator (HFXT)
        2. 7.18.3.2 48MHz RC Oscillator (HFOSC)
        3. 7.18.3.3 32kHz Crystal Oscillator (LFXT)
        4. 7.18.3.4 32kHz RC Oscillator (LFOSC)
    19. 7.19 Peripheral Characteristics
      1. 7.19.1 UART
        1. 7.19.1.1 UART Characteristics
      2. 7.19.2 SPI
        1. 7.19.2.1 SPI Characteristics
        2. 7.19.2.2 SPI Controller Mode
        3. 7.19.2.3 SPI Timing Diagrams—Controller Mode
        4. 7.19.2.4 SPI Peripheral Mode
        5. 7.19.2.5 SPI Timing Diagrams—Peripheral Mode
      3. 7.19.3 I2C
        1. 7.19.3.1 I2C
        2. 7.19.3.2 I2C Timing Diagram
      4. 7.19.4 GPIO
        1. 7.19.4.1 GPIO DC Characteristics
      5. 7.19.5 ADC
        1. 7.19.5.1 Analog-to-Digital Converter (ADC) Characteristics
      6. 7.19.6 Comparators
        1. 7.19.6.1 Ultra-Low Power Comparator
    20. 7.20 Typical Characteristics
      1. 7.20.1 MCU Current
      2. 7.20.2 RX Current
      3. 7.20.3 TX Current
      4. 7.20.4 RX Performance
      5. 7.20.5 TX Performance
      6. 7.20.6 ADC Performance
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Bluetooth 5.4 Low Energy
    4. 8.4  Memory
    5. 8.5  Cryptography
    6. 8.6  Timers
    7. 8.7  Serial Peripherals and I/O
    8. 8.8  Battery and Temperature Monitor
    9. 8.9  µDMA
    10. 8.10 Debug
    11. 8.11 Power Management
    12. 8.12 Clock Systems
    13. 8.13 Network Processor
  10. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
    3. 10.3 Documentation Support
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Timers

A large selection of timers is available as part of the CC2340R5-Q1 device. These timers are:

  • Real-Time Clock (RTC)

    The RTC is a 67-bit, 2-channel timer running on the LFCLK system clock. The RTC is active in STANDBY and ACTIVE power states. When the device enters the RESET or SHUTDOWN state, the RTC is reset.

    The RTC accumulates the time elapsed since reset on each LFCLK. The RTC counter is incremented by LFINC at a rate of 32.768kHz. LFINC indicates the period of LFCLK in μs, with an additional granularity of 16 fractional bits.

    The counter can be read from two 32-bit registers. RTC.TIME8U has a range of approximately 9.5 hours with an LSB representing 8 microseconds. RTC.TIME524M has a range of approximately 71.4 years with an LSB representing 524 milliseconds.

    There is hardware synchronization between the system timer (SYSTIM) and the RTC so that the multichannel and higher resolution SYSTIM remains in synchronization with the RTC’s time base.

    The RTC has two channels: one compare channel and one capture channel, and is capable of waking the device out of the standby power state. The RTC compare channel is typically used only by system software and only during the standby power state.

  • System Timer (SYSTIM)
    The SYSTIM is a 34-bit, 5-channel wrap-around timer with a per-channel selectable 32b slice with either a 1μs resolution and 1h11m35s range or 250ns resolution and 17m54s range. All channels support both capture and single-shot compare (posting an event) operations. One channel is reserved for system software, three channels are reserved for radio software, and one channel is freely available to user applications.

    For software convenience, a hardware synchronization mechanism automatically ensures that the RTC and SYSTIM share a common time base (albeit with different resolutions/spans). Another software convenience feature is that SYSTIM qualifies any submitted compare values so that the timer channel will immediately trigger if the submitted event is in the immediate past (4.294s with 1μs resolution and 1.049s with 250ns resolution).

  • General Purpose Timers (LGPT)

    The CC2340R5-Q1 device provides four LGPTs with 3 × 16 bit timers and 1× 24-bit timer, all running up to 48MHz. The LGPTs support a wide range of features such as:

    • Three capture/compare channels
    • One-shot or periodic counting
    • Pulse width modulation (PWM)
    • Time counting between edges and edge counting
    • Input filter implemented on each of the channels for all timers
    • IR generation feature available on Timer-0 and Timer-1
    • Deadband feature available on Timer-1

    The timer capture/compare and PWM signals are connected to IOs through the IO controller module (IOC), and the internal timer event connections to CPU, DMA, and other peripherals are through the event fabric, which allows the timers to interact with signals such as GPIO inputs, other timers, DMA, and ADC. Two LGPTs (2× 16-bit timers) support quadrature decoder mode to enable buffered decoding of quadrature-encoded sensor signals. The LGPTs are available in device Active and Idle power modes.

    Table 8-1 Timer Comparison
    FeatureTimer 0Timer 1Timer 2Timer 3
    Counter Width16-bit16-bit16-bit24-bit
    Quadrature DecoderYesNoYesNo
    Park Mode on FaultNoYesNoNo
    Programmable Dead-Band InsertionNoYesNoNo
  • Watchdog timer

    The watchdog timer is used to regain control if the system operates incorrectly due to software errors. Upon counter expiry, the watchdog timer resets the device when periodic monitoring of the system components and tasks fails to verify proper functionality. The watchdog timer runs on a 32kHz clock rate and operates in device active, idle, and standby modes, and cannot be stopped once enabled.