TIDUES6 August   2020  – MONTH 

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 DRV8906-Q1
      2. 2.3.2 DRV8873-Q1
      3. 2.3.3 TPS1HB16-Q1
      4. 2.3.4 LM2904B-Q1
      5. 2.3.5 TLIN1028-Q1
    4. 2.4 System Design Theory
      1. 2.4.1 Mirror XY and LED Driver
      2. 2.4.2 Mirror Fold Driver
      3. 2.4.3 Mirror Heater Driver for Defogging and De-icing
      4. 2.4.4 Electrochromic Mirror Driver
        1. 2.4.4.1 Sallen-Key Low-Pass Filter
        2. 2.4.4.2 High-Current Buffer Amplifier
        3. 2.4.4.3 Buffer Amplifier Stability for Very-Large Capacitive Loads
        4. 2.4.4.4 Fast Discharge of Large Capacitive Load
      5. 2.4.5 SBC - LIN Communication Interface and System Supply
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
    2. 3.2 Testing and Results
      1. 3.2.1 Test Setup
      2. 3.2.2 Test Results
        1. 3.2.2.1 Reverse Battery Protection
        2. 3.2.2.2 X&Y Motors and LED Driver
        3. 3.2.2.3 Thermal Performance
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 Altium Project
    4. 4.4 Gerber Files
    5. 4.5 Assembly Drawings
  10. 5Software Files
  11. 6Related Documentation
    1. 6.1 Trademarks
    2. 6.2 Third-Party Products Disclaimer
  12. 7Terminology

2.4.2 Mirror Fold Driver

The mirror fold driver is handled by the DRV8873-Q1, a 10-A integrated motor driver. This driver can provide the 8-A maximum peak current needed to drive the mirror fold motor.

Figure 2-8 shows the configuration schematic. The capacitors (C6, C7, C8, and C9) are selected based on the recommendations on the DRV8873-Q1 data sheet. Likewise, the data sheet recommends a pullup resistor greater than 10 kΩ on the nFAULT pin. The two IPROPI resistors are chosen such that the maximum drive current is set to 8 A which is the maximum current rating of the motor. The SRC pins are shorted to GND to create a low impedance path between the power FET source and GND.

GUID-4D65FC3C-840C-425D-BCD3-3B9A33755CCB-low.pngFigure 2-8 DRV8873-Q1 Configuration Schematic