TIDUF09 December   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Theory of Operation
    4. 2.4 Highlighted Products
      1. 2.4.1 TPS7A57 Low Dropout (LDO) Regulator
      2. 2.4.2 LMG1020 Low Side Driver
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
      1. 3.2.1 Optional Load Transient Circuit Operation
    3. 3.3 Test Results
      1. 3.3.1 Current Sharing
      2. 3.3.2 VLOAD vs ILOAD
      3. 3.3.3 Load Transient Response
      4. 3.3.4 Current Limit
      5. 3.3.5 Startup
      6. 3.3.6 Noise
      7. 3.3.7 PSRR
      8. 3.3.8 Thermal
      9. 3.3.9 Thermal Limit Protection
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  10. 5About the Author

1.1 Key System Specifications

Table 1-1 Key System Specifications
PARAMETER SPECIFICATIONS
Input Power Rail 0.86 V (with Bias) or 1.1 V (without Bias) to 6 V
Bias Power Rail 3 V to 11 V
Maximum Output Current 13.5 A
VOUT Transient Deviation, 0 A to 13.5 A to 0 A, 1 A/µs (Typical) (1) ± 2 mVPK
VOUT Transient Deviation, 0 A to 13.5 A to 0 A, 10 A/µs (Typical) (1) ± 9 mVPK
VOUT Transient Deviation, 0 A to 13.5 A to 0 A, 100 A/µs (Typical) (1) +28 mVPK / -19 mVPK
VOUT Transient Deviation, 0 A to 13.5 A to 0 A, 100 A/µs (Typical) (2) +11 mVPK / -8.5 mVPK
Output Voltage Range 0.5 V to 5.2 V
Optimized for Output Voltage, VOUT 0.75 V
Ballast Resistor 2.5 mΩ
Load Regulation 1.15 mV / A
  1. Each TPS7A57 LDO has 22 µF // 2.2 µF ceramic capacitors on the OUT pin to GND, before the ballast resistor. There is one additional 22 µF ceramic capacitor after the 2.5 mΩ ballast resistors located near the load.
  2. Each TPS7A57 LDO has 22 µF // 2.2 µF ceramic capacitors on the OUT pin to GND, before the ballast resistor. There are two additional 100 µF ceramic capacitors after the 2.5 mΩ ballast resistors located near the load.