TIDUF09 December   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Theory of Operation
    4. 2.4 Highlighted Products
      1. 2.4.1 TPS7A57 Low Dropout (LDO) Regulator
      2. 2.4.2 LMG1020 Low Side Driver
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
      1. 3.2.1 Optional Load Transient Circuit Operation
    3. 3.3 Test Results
      1. 3.3.1 Current Sharing
      2. 3.3.2 VLOAD vs ILOAD
      3. 3.3.3 Load Transient Response
      4. 3.3.4 Current Limit
      5. 3.3.5 Startup
      6. 3.3.6 Noise
      7. 3.3.7 PSRR
      8. 3.3.8 Thermal
      9. 3.3.9 Thermal Limit Protection
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  10. 5About the Author

2.2 Design Considerations

This reference design incorporates three high-speed, high-current LDO's. When the reference design output is loaded with a high current, fast ramp rate load step, charge is transferred from the input supply through the LDO to the output. This rapid transfer of charge from VIN to VOUT can cause a significant voltage drop at VIN during the load transient. The LDO can momentarily enter dropout which will negatively affect the load transient performance. There are two common solutions:

  1. Power VIN with a high bandwidth power converter, such that VIN is well regulated at all times.
  2. Place a capacitor bank on VIN to hold up the voltage during a large load step.

The design engineer needs to carefully evaluate their load transient requirements and design the supply providing VIN accordingly to mitigate these concerns. This reference design has included a large capacitor bank to help with load transient evaluations using bench top power supplies. This capacitor bank might or might not be required in the final system based on the input power supplies performance.