TIDUFE3A July   2025  – January 2026

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS7A03
      2. 2.3.2 REF35
      3. 2.3.3 TVS3301
      4. 2.3.4 OPA391
      5. 2.3.5 AFE881H1
      6. 2.3.6 AFE882H1
      7. 2.3.7 SN74LV8T165
      8. 2.3.8 TMUX1219
  9. 3System Design Theory
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Test Setup
    3. 4.3 Test Results
      1. 4.3.1 Linearity Tests
        1. 4.3.1.1 Linearity Tests Summary
      2. 4.3.2 Noise Tests and Current Histogram
        1. 4.3.2.1 Noise Tests and Current Histogram Summary
      3. 4.3.3 Step Response
        1. 4.3.3.1 Step Response Summary
      4. 4.3.4 Start-Up
      5. 4.3.5 MCU Current
        1. 4.3.5.1 MCU Current Summary
      6. 4.3.6 System Currents
        1. 4.3.6.1 Summary of System Currents
      7. 4.3.7 ADC Input
      8. 4.3.8 Temperature Input
        1.       39
      9. 4.3.9 Complete Signal Chain
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 Layout Prints
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author
  13. 7Revision History

4.3.3.1 Step Response Summary

Table 4-6 shows a summary of the rise and fall times. The AFE882H1 hardware is designed to have slower rise and fall times. Nevertheless, the plots show there are no overshoots, undershoots, or oscillations.

Table 4-6 Rise Time and Fall Time Summary
AFESUPPLY (V)DAC SETTINGRISE TIME (µs)FALL TIME (µs)
AFE8813.3655352628
AFE8813.3327683836
AFE8811.8655353333
AFE8811.8327683031
AFE8823.365535790803
AFE8823.332768792795