TIDUFE3A July   2025  – January 2026

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS7A03
      2. 2.3.2 REF35
      3. 2.3.3 TVS3301
      4. 2.3.4 OPA391
      5. 2.3.5 AFE881H1
      6. 2.3.6 AFE882H1
      7. 2.3.7 SN74LV8T165
      8. 2.3.8 TMUX1219
  9. 3System Design Theory
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Test Setup
    3. 4.3 Test Results
      1. 4.3.1 Linearity Tests
        1. 4.3.1.1 Linearity Tests Summary
      2. 4.3.2 Noise Tests and Current Histogram
        1. 4.3.2.1 Noise Tests and Current Histogram Summary
      3. 4.3.3 Step Response
        1. 4.3.3.1 Step Response Summary
      4. 4.3.4 Start-Up
      5. 4.3.5 MCU Current
        1. 4.3.5.1 MCU Current Summary
      6. 4.3.6 System Currents
        1. 4.3.6.1 Summary of System Currents
      7. 4.3.7 ADC Input
      8. 4.3.8 Temperature Input
        1.       39
      9. 4.3.9 Complete Signal Chain
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 Layout Prints
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author
  13. 7Revision History

Complete Signal Chain

For testing the complete signal chain, including ADC, signal processing and AFE882H2, a simple pressure cell simulator creates three voltage steps. The simulator uses the schematic shown in Figure 4-61 to simulate the sensor bridge. The simulator creates voltage steps that simulate low, medium, and maximum readings.


TIDA-010982 Pressure Sensor Simulator Schematic

Figure 4-61 Pressure Sensor Simulator Schematic

The minimum voltage targets 0mV, but resistor tolerances create a slightly higher value. The medium setting produces 1.86mV and the maximum produces 3.83mV.

For testing, engineers determined calibration values based on ADC readings for the three simulator steps. Engineers also determined DAC settings corresponding to desired current readings and apply a linearization function using the temperature reading. Table 4-9 shows measured ADC readings, ADC voltage, and measured noise. The DAC settings relate to previous tests. All tests simulate the RTD with a 100Ω resistor.

Figure 4-62 shows the test setup.


TIDA-010982 System Test setup

Figure 4-62 System Test setup
Table 4-9 Measured ADC Readings, ADC Voltage, and Measured Noise
SIMULATOR SETTINGADC READING HEXADC VOLTAGEADC PEAK-TO-PEAK NOISEDESIRED OUTPUT CURRENTDAC SETTING
Minimum0x4474e0.32mV5810 digits (6.7µV)4mA0xbb8
Medium0x1bbaf82.11mV8093 digits (9.4µV)12mA0x6df6
Maximum0x31b87e3.79mV6763 digits (7.8µV)20mA0xd034

The pressure_temp_adc_condition.c file contains the resulting calibration and offset values.

static int32_t h0 = 27340;
...
static int32_t g0 = 18135484;
...
static int32_t n0 = 421023099;
...
static int32_t P_offset = -1769446;
static int32_t T_offset = 0;

This configuration allows measurement of loop current for the complete system with three different simulator settings.

With the simulator set to minimum, the system produces an expected current of 4mA. The measurements in Figure 4-63 to Figure 4-66 show the raw ADC reading including noise with histogram, as well as the measured loop current with histogram. The average loop current measures 4.00mA with peak-to-peak noise of 33µA.


TIDA-010982 Minimum Setting Loop Current

Figure 4-63 Minimum Setting Loop Current

TIDA-010982 Minimum Setting ADC Reading

Figure 4-65 Minimum Setting ADC Reading

TIDA-010982 Minimum Setting Loop Current Histogram

Figure 4-64 Minimum Setting Loop Current Histogram

TIDA-010982 Minimum Setting ADC Reading Histogram

Figure 4-66 Minimum Setting ADC Reading Histogram

The same test uses the medium setting with an expected current of 12mA. The measurements in Figure 4-67 to Figure 4-70 show the raw ADC reading including noise with histogram, as well as the measured loop current with histogram. The average loop current measures 12.02mA with peak-to-peak noise of 40µA.


TIDA-010982 Middle Setting Loop Current

Figure 4-67 Middle Setting Loop Current

TIDA-010982 Middle Setting ADC Reading

Figure 4-69 Middle Setting ADC Reading

TIDA-010982 Middle Setting Loop Current Histogram

Figure 4-68 Middle Setting Loop Current Histogram

TIDA-010982 Middle Setting ADC Reading Histogram

Figure 4-70 Middle Setting ADC Reading Histogram

The test also uses the maximum setting with an expected current of 20mA. The measurements in Figure 4-71 to Figure 4-74 show the raw ADC reading including noise with histogram, as well as the measured loop current with histogram. The average loop current measures 20.06mA with peak-to-peak noise of 37µA.


TIDA-010982 Maximum Setting Loop Current

Figure 4-71 Maximum Setting Loop Current

TIDA-010982 Maximum Setting ADC Reading

Figure 4-73 Maximum Setting ADC Reading

TIDA-010982 Maximum Setting Loop Current Histogram

Figure 4-72 Maximum Setting Loop Current Histogram

TIDA-010982 Maximum Setting ADC Reading Histogram

Figure 4-74 Maximum Setting ADC Reading Histogram