The backbone removes the need for a traditional PDB by controlling power flow in a modular series connection format throughout each zone. Reduced current requirements and reduced thermals enable this backbone approach. The backbone approach performs both primary and secondary power distribution in each zone. See also Figure 2-2 to view backbone configuration in a zone architecture.

Figure 2-2 Backbone in Zone

Using a backbone approach brings forth many design considerations and challenges, which include:

1. The system maintains always-on power flow through each zone in active and park (LPM) mode
2. The system protects against overcurrent and short-circuit scenarios

This design implements the backbone using two TPS1212-Q1 HSSCs. Each TPS1212-Q1 device facilitates constant power flow through the zones. The device uses either the LPM path in a parked state or the main path in a running state. The TPS1212-Q1 devices provide automatic load wakeup from LPM to active state. The devices protect against short-to-ground scenarios at the inputs to each zone. The TPS1212-Q1 monitors current bidirectionally but can only protect from short-to-ground scenarios in the forward direction. Discrete logic with the TPLD1201-Q1 programmable logic device provides the reverse direction short-to-ground protection. This design enables the backbone to provide automatic load wakeup with the TPS1212-Q1 devices independent of the MCU. Figure 2-3 shows the overall architecture of the backbone in this design.

Figure 2-3 High-Level Backbone Configuration

Figure 2-4 shows a more detailed diagram of the backbone design for this board. Some key things to note about Figure 2-4 is the configuration directions of low power mode wake, SCP, and OCP I2t for each of the TPS1212-Q1 devices.

The TPS1212-Q1 on the left side of the zone (EVM 1) is configured for low power mode wakeup for current flowing left to right across the R_BYPASS resistor in the low power path. Due to the configuration of the low power mode wakeup, the SCP for this TPS1212-Q1 connects left to right as well, which does not provide the desired behavior. By implementing a TPLD1201-Q1 logic circuit, the backbone now allows for SCP in the reverse direction (right to left). The OCP I2t direction connects with respect to the CS1+ and CS1– pins, flowing from + (right) to – (left).

The TPS1212-Q1 on the right side of the zone (EVM 2) is configured for low power mode wakeup for current flowing left to right across the R_BYPASS resistor in the low power path. This configuration matches the other TPS1212-Q1 because in this design, it is assumed that a load wakeup event does not occur from the right side of the zone, since this side connects to the HV/LV DCDC that is only on in active state. This design assumed every load wakeup event originates from the left input. Due to the configuration of the low power mode wakeup, the SCP for this TPS1212-Q1 connects in the same direction, from left to right. No additional circuitry is required. The design configured OCP I2t from left to right with respect to the CS1+ and CS1– pins, flowing from + (left) to – (right).

Figure 2-4 Backbone Design for TIDA-020094

See Section 3.4 for backbone test results.