SLLSF98 December   2018 SN55HVD233-SEP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Driver Electrical Characteristics
    6. 7.6  Receiver Electrical Characteristics
    7. 7.7  Driver Switching Characteristics
    8. 7.8  Receiver Switching Characteristics
    9. 7.9  Device Switching Characteristics
    10. 7.10 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Modes
      2. 9.3.2 Loopback
      3. 9.3.3 CAN Bus States
      4. 9.3.4 ISO 11898 Compliance of SN55HVD233-SEP
        1. 9.3.4.1 Introduction
        2. 9.3.4.2 Differential Signal
          1. 9.3.4.2.1 Common-Mode Signal
        3. 9.3.4.3 Interoperability of 3.3-V CAN in 5-V CAN Systems
      5. 9.3.5 Thermal Shutdown
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Diagnostic Loopback
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Slope Control
        2. 10.2.2.2 Standby
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Bus Loading, Length, and Number of Nodes
      2. 12.1.2 CAN Termination
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • VID V62/18617
  • Radiation Hardened
    • Single Event Latch-up (SEL) Immune to 43 MeV-cm2/mg at 125°C
    • ELDRS Free to 30 krad(Si)
    • Total Ionizing Dose (TID) RLAT for Every Wafer Lot up to 20 krad(Si)
  • Space Enhanced Plastic
    • Controlled Baseline
    • Gold Wire
    • NiPdAu Lead Finish
    • One Assembly and Test Site
    • One Fabrication Site
    • Available in Military (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
    • Enhanced Mold Compound for Low Outgassing
  • Compatible With ISO 11898-2
  • Bus Pins Fault Protection Exceeds ±16 V
  • Bus Pins ESD Protection Exceeds ±14-kV HBM
  • Data Rates up to 1 Mbps
  • Extended –7-V to 12-V Common Mode Range
  • High-Input Impedance Allows for 120 Nodes
  • LVTTL I/Os are 5-V Tolerant
  • Adjustable Driver Transition Times for Improved Signal Quality
  • Unpowered Node Does Not Disturb the Bus
  • Low-Current Standby Mode, 200-µA Typical
  • Loopback for Diagnostic Functions
  • Thermal Shutdown Protection
  • Power Up and Power Down With Glitch-Free Bus Inputs and Outputs
    • High-Input Impedance With Low VCC
    • Monolithic Output During Power Cycling