SLLSFG7B
September 2020 – November 2022
SN65MLVD203B
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Electrical Characteristics – Driver
6.7
Electrical Characteristics – Receiver
6.8
Switching Characteristics – Driver
6.9
Switching Characteristics – Receiver
6.10
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Power-On-Reset
8.3.2
ESD Protection
8.3.3
RX Maximum Jitter While DE Toggling
8.4
Device Functional Modes
8.4.1
Operation with VCC < 1.5 V
8.4.2
Operations with 1.5 V ≤ VCC < 3 V
8.4.3
Operation with 3 V ≤ VCC < 3.6 V
8.4.4
Device Function Tables
8.4.5
Equivalent Input and Output Schematic Diagrams
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Multipoint Communications
9.2.2
Design Requirements
9.2.3
Detailed Design Procedure
9.2.3.1
Supply Voltage
9.2.3.2
Supply Bypass Capacitance
9.2.3.3
Driver Input Voltage
9.2.3.4
Driver Output Voltage
9.2.3.5
Termination Resistors
9.2.3.6
Receiver Input Signal
9.2.3.7
Receiver Input Threshold (Failsafe)
9.2.3.8
Receiver Output Signal
9.2.3.9
Interconnecting Media
9.2.3.10
PCB Transmission Lines
9.2.4
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.1.1
Microstrip vs. Stripline Topologies
9.4.1.2
Dielectric Type and Board Construction
9.4.1.3
Recommended Stack Layout
9.4.1.4
Separation Between Traces
9.4.1.5
Crosstalk and Ground Bounce Minimization
9.4.1.6
Decoupling
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RUM|16
MPQF223A
Thermal pad, mechanical data (Package|Pins)
RUM|16
QFND157C
Orderable Information
sllsfg7b_oa
sllsfg7b_pm
1
Features
Compatible with the M-LVDS standard TIA/EIA-899 for multipoint data interchange
Low-voltage differential 30-Ω to 55-Ω line driver and receiver for signaling rates
(1)
up to
200 Mbps, clock frequencies up to 100 MHz
Type-1 receiver incorporates 25 mV of hysteresis
Bus I/O protection
±8-kV HBM
±8-kV IEC 61000-4-2 contact discharge
Controlled driver output voltage transition times for improved signal quality
–1-V to 3.4-V common-mode voltage range allows data transfer with 2 V of ground noise
Bus pins high impedance when disabled or V
CC
≤ 1.5 V
100-Mbps device available (SN65MLVD202B)
Improved alternatives to SN65MLVD203
(1)
1.
The signaling rate of a line is the number of voltage transitions that are made per second expressed in the bps of the unit (bits per second).