Product details

Vin (Max) (V) 5.5 Rating Catalog
Vin (Max) (V) 5.5 Rating Catalog
PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6
  • Power monitoring and switching for 3-volt battery-backup applications
  • Write-protect control
  • 2-input decoder for control of up to 4 banks of SRAM
  • 3-volt primary cell inputs
  • Less than 10ns chip-enable propagation delay
  • 5% or 10% supply operation
  • Power monitoring and switching for 3-volt battery-backup applications
  • Write-protect control
  • 2-input decoder for control of up to 4 banks of SRAM
  • 3-volt primary cell inputs
  • Less than 10ns chip-enable propagation delay
  • 5% or 10% supply operation

The CMOS bq2204A SRAM Non-volatile Controller Unit provides all necessary functions for converting up to four banks of standard CMOS SRAM into nonvolatile read/write memory.

A precision comparator monitors the 5V VCC input for an out-of-tolerance condi-tion. When out-of-tolerance is detected, the four conditioned chip-enable outputs are forced inactive to write-protect up to four banks of SRAM.

During a power failure, the external SRAMs are switched from the VCC supply to one of two 3V backup sup-plies. On a subsequent power-up, the SRAMs are write-protected until a power-valid condition exists.

During power-valid operation, a two-input decoder transparently selects one of up to four banks of SRAM.

The CMOS bq2204A SRAM Non-volatile Controller Unit provides all necessary functions for converting up to four banks of standard CMOS SRAM into nonvolatile read/write memory.

A precision comparator monitors the 5V VCC input for an out-of-tolerance condi-tion. When out-of-tolerance is detected, the four conditioned chip-enable outputs are forced inactive to write-protect up to four banks of SRAM.

During a power failure, the external SRAMs are switched from the VCC supply to one of two 3V backup sup-plies. On a subsequent power-up, the SRAMs are write-protected until a power-valid condition exists.

During power-valid operation, a two-input decoder transparently selects one of up to four banks of SRAM.

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* Data sheet X4 SRAM Nonvolatile Controller Unit datasheet 05 Sep 1999

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PDIP (N) 16 View options
SOIC (D) 16 View options

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