Packaging information
| Package | Pins NFBGA (ZVB) | 176 |
| Operating temperature range (°C) -30 to 85 |
| Package qty | Carrier 260 | JEDEC TRAY (5+1) |
Features for the DLPC3434
- Display controller for DLP230KP (.23 HD) DMD
- Supports input resolutions up to 720p
- Low-power DMD interface with interface training
- Input frame rates up to 120 Hz (60 Hz at 720p resolution)
- Pixel data processing:
-
IntelliBright™ suite of image processing algorithms
- Content adaptive illumination control (CAIC)
- Local area brightness boost (LABB)
- Image resizing (scaling)
- 1D Keystone correction
- Color coordinate adjustment
- Active power management processing
- Programmable degamma
- Color space conversion
- 4:2:2 to 4:4:4 chroma interpolation
-
IntelliBright™ suite of image processing algorithms
- 24-bit, input pixel interface support:
- Parallel interface protocol
- Pixel clock up to 155 MHz
- Multiple input pixel data format options
- External flash support
- Auto DMD parking at power down
- Embedded frame memory (eDRAM)
- System features:
- I2C device control
- Programmable splash screens
- Programmable LED current control
- Display image rotation
- One frame latency
- Pair with DLPA2000, DLPA2005, or DLPA3000 PMIC (power management integrated circuit) and LED driver
Description for the DLPC3434
The DLPC3434 digital controller, a component of the DLP230KP (.23 HD) chipset, supports reliable operation of the DLP230KP digital micromirror device (DMD). The DLPC3434 controller provides a convenient, multifunctional interface between system electronics and the DMD, enabling small form factor, low power, and high resolution HD displays.
Visit the getting started with TI DLP Pico™ display technology page, and view the programmer’s guide to learn how to get started.
The DLP230KP chipset includes established resources to help the user accelerate the design cycle, which include production ready optical modules, optical modules manufactures, and design houses.