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The DS90LV018A is a single CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.
The DS90LV018A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV018A has a flow-through design for easy PCB layout.
The DS90LV018A and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | DS90LV018A 3V LVDS Single CMOS Differential Line Receiver datasheet (Rev. D) | Apr 16, 2013 | |
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | Aug 3, 2018 | ||
| Application brief | DACx1416 Delivers Optimized Solution to Mach Zehnder Modulator Biasing | Jun 29, 2018 | ||
| Application note | An Overview of LVDS Technology | Oct 5, 1998 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
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