1080p oLDI Dual FPD-Link III Deserializer with HDCP



Product details


Function Deserializer Color depth (bpp) 24 Input compatibility FPD-Link III LVDS Pixel clock frequency (Max) (MHz) 192 Output compatibility LVDS Features HDCP, I2C Config, I2S Audio Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Operating temperature range (C) -40 to 105 open-in-new Find other FPD-Link SerDes

Package | Pins | Size

WQFN (NKD) 64 81 mm² 9 x 9 open-in-new Find other FPD-Link SerDes


  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 2: –40°C to +105°C Ambient Operating Temperature
  • Supports Pixel Clock Frequency up to 192 MHz for up to 2K (2048x1080) Resolutions With 24-Bit Color Depth
  • 1-Lane or 2-Lane FPD-Link III Interface With De-Skew Capability
  • Single or Dual OpenLDI (LVDS) Transmitter
    • Single Channel: Up to 96-MHz Pixel Clock
    • Dual Channel: Up to 192-MHz Pixel Clock
    • Configurable 18-Bit RGB or 24-Bit RGB
  • Integrated HDCP Cipher Engine With On-Chip Key Storage
  • Supports HDCP Repeater Applications
  • Functional Safety-Capable
    • Documentation available to aid ISO 26262 system design
  • Four High-Speed GPIOs (up to 2 Mbps each)
  • Adaptive Receive Equalization
    • Compensates for Channel Insertion Loss of up to –15.3 dB at 1.7 GHz
    • Provides Automatic Temperature and Cable Aging Compensation
  • SPI Control Interfaces up to 3.3 Mbps
  • I2C (Master/Slave) With 1-Mbps Fast-Mode Plus
  • Image Enhancement (White Balance and Dithering)
  • Supports 7.1 Multiple I2S (4 Data) Channels
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The DS90UH948-Q1 is a FPD-Link III deserializer which, in conjunction with the DS90UH949A/949/947-Q1 serializers, converts 1-lane or 2-lane FPD-Link III streams into a FPD-Link (OpenLDI) interface. The deserializer is capable of operating over cost-effective 50-Ω single-ended coaxial or 100-Ω differential shielded twisted-pair (STP) cables. It recovers the data from one or two FPD-Link III serial streams and translates it into dual pixel FPD-Link (8 LVDS data lanes + clock) supporting video resolutions up to 2K (2048x1080) with 24-bit color depth. This provides a bridge between HDMI enabled sources such as GPUs to connect to existing LVDS displays or application processors.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C and SPI communication, over the same differential link. Consolidation of video data and control over two differential pairs decreases the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In backward compatible mode, the device supports up to WXGA and 720p resolutions with 24-bit color depth over a single differential link.

The device automatically senses the FPD-Link III channels and supplies a clock alignment and de-skew functionality without the need for any special training patterns. This ensures skew phase tolerance from mismatches in interconnect wires such as PCB trace routing, cable pair-to-pair length differences, and connector imbalances.

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Technical documentation

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Type Title Date
* Data sheet DS90UH948-Q1 2K FPD-Link III to OpenLDI Deserializer With HDCP datasheet (Rev. C) Dec. 21, 2020
Technical article How to choose a power supply for an automotive camera module Sep. 17, 2020
User guide FPD-Link Margin Analysis Program (MAP) user's guide Jan. 14, 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The Texas Instruments DS90UH948-Q1EVM evaluation module (EVM) converts FPD-Link III to OpenLDI.

This kit will demonstrate the functionality and operation of the DS90UH948-Q1. The DS90UH948-Q1 supports HDCP content protection. The DS90UH948-Q1 is a FPD-Link III Deserializer which, in conjunction with (...)

  • Supports Pixel Clock Frequency up to 170 MHz for WUXGA (1920x1200) and 1080p60 resolutions with 24-bit Color Depth
  • 2-lane FPD-Link III interface with De-skew capability
  • OpenLDI LVDS Transmitter with Selectable Single or Dual Pixel LVDS
  • Capable to recover data up to 15 meters with 50Ω Coaxial or 10 (...)

Software development

Analog LaunchPad™ software
ALP Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:
  • Local and remote device access
  • Device (...)

Design tools & simulation

SNLM183.ZIP (73 KB) - IBIS Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

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