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The DS91C176 and DS91D176 are 100 MHz single channel M-LVDS (Multipoint Low Voltage Differential Signaling) transceivers designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based systems). M-LVDS is a new bus interface standard (TIA/EIA-899) optimized for multidrop networks. Controlled edge rates, tight input receiver thresholds and increased drive strength are sone of the key enhancements that make M-LVDS devices an ideal choice for distributing signals via multipoint networks.
The DS91C176/DS91D176 are half-duplex transceivers that accept LVTTL/LVCMOS signals at the driver inputs and convert them to differential M-LVDS signals. The receiver inputs accept low voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL and CML) and convert them to 3V LVCMOS signals. The DS91D176 has a M-LVDS type 1 receiver input with no offset. The DS91C176 has an M-LVDS type 2 receiver which enable failsafe functionality.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | DS91D176/DS91C176 100 MHz Single Channel M-LVDS Transceivers datasheet (Rev. L) | Apr 16, 2013 | |
| Application brief | How Far, How Fast Can You Operate MLVDS? | Aug 6, 2018 | ||
| Application note | Designing an ATCA Compliant M-LVDS Clock Distribution Network (Rev. B) | Apr 26, 2013 | ||
| Application note | Introduction to M-LVDS (TIA/EIA-899) (Rev. A) | Jan 3, 2013 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
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