LM3S5632 is not recommended for new designs
This product continues to be available for existing customers. New designs should consider an alternate product.
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Product details

Flash memory (kByte) 128 Number of GPIOs 33 UART 2 Number of I2Cs 2 Operating temperature range (°C) -40 to 85 PWM (Ch) 0 CAN (#) 1 Rating Catalog
Flash memory (kByte) 128 Number of GPIOs 33 UART 2 Number of I2Cs 2 Operating temperature range (°C) -40 to 85 PWM (Ch) 0 CAN (#) 1 Rating Catalog
LQFP (PM) 64 144 mm² 12 x 12
  • 32-bit ARM® Cortex™-M3 50-MHz processor core with System Timer (SysTick), integrated Nested Vectored Interrupt Controller (NVIC), Memory Protection Unit (MPU), and Thumb-2 instruction set

  • Full-featured debug solution with debug access via JTAG and Serial Wire interfaces, and IEEE 1149.1-1990 compliant Test Access Port (TAP) controller

  • 128 KB single-cycle flash and 32 KB single-cycle SRAM

  • Internal ROM loaded with StellarisWare® software

  • Lower-power battery-backed Hibernation module with Real-Time Clock

  • ARM PrimeCell® 32-channel configurable μDMA controller

  • 1-33 GPIOs (depending on configuration) with programmable control for GPIO interrupts and pad configuration

  • ARM FiRM-compliant Watchdog Timer ; plus three General-Purpose Timer Modules (GPTM), each of which provides two 16-bit timers/counters and can be configured to operate independently

  • 10-bit Analog-to-Digital Converter (ADC) with six analog input channels and a sample rate of 500 thousand samples/second

  • Two fully programmable 16C550-type UARTs with IrDA support

  • Synchronous Serial Interface (SSI), supporting operation for Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces

  • Two Inter-Integrated Circuit (I2C) Interface modules, providing Standard (100 Kbps) and Fast (400 Kbps) transmission and support for sending and receiving data as either a master or a slave

  • Controller Area Network (CAN) Interface using CAN protocol version 2.0 part A/B and with bit rates up to 1 Mbps

  • Universal Serial Bus (USB) Controller with USB 2.0 full-speed (12 Mbps) and low-speed (1.5 Mbps) operation, 8 endpoints, and USB Host mode

  • Industrial-range 64-pin RoHS-compliant LQFP package

  • 32-bit ARM® Cortex™-M3 50-MHz processor core with System Timer (SysTick), integrated Nested Vectored Interrupt Controller (NVIC), Memory Protection Unit (MPU), and Thumb-2 instruction set

  • Full-featured debug solution with debug access via JTAG and Serial Wire interfaces, and IEEE 1149.1-1990 compliant Test Access Port (TAP) controller

  • 128 KB single-cycle flash and 32 KB single-cycle SRAM

  • Internal ROM loaded with StellarisWare® software

  • Lower-power battery-backed Hibernation module with Real-Time Clock

  • ARM PrimeCell® 32-channel configurable μDMA controller

  • 1-33 GPIOs (depending on configuration) with programmable control for GPIO interrupts and pad configuration

  • ARM FiRM-compliant Watchdog Timer ; plus three General-Purpose Timer Modules (GPTM), each of which provides two 16-bit timers/counters and can be configured to operate independently

  • 10-bit Analog-to-Digital Converter (ADC) with six analog input channels and a sample rate of 500 thousand samples/second

  • Two fully programmable 16C550-type UARTs with IrDA support

  • Synchronous Serial Interface (SSI), supporting operation for Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces

  • Two Inter-Integrated Circuit (I2C) Interface modules, providing Standard (100 Kbps) and Fast (400 Kbps) transmission and support for sending and receiving data as either a master or a slave

  • Controller Area Network (CAN) Interface using CAN protocol version 2.0 part A/B and with bit rates up to 1 Mbps

  • Universal Serial Bus (USB) Controller with USB 2.0 full-speed (12 Mbps) and low-speed (1.5 Mbps) operation, 8 endpoints, and USB Host mode

  • Industrial-range 64-pin RoHS-compliant LQFP package

The Stellaris® LM3S5632 microcontroller is based on the ARM® Cortex™-M3 controller core operating at up to 50 MHz, with 128 kB flash, 32 kB SRAM, a 32-ch DMA, and ROM preloaded with the StellarisWare Driver Library and BootLoader. The LM3S5632 also features real-time industrial connectivity, with a CAN controller, USB 2.0 Full Speed Host/Device, an SSI / SPI controller, 2 I2C interfaces, and 2 UARTs. The microcontroller also features intelligent analog capability, including .6 channels of highly accurate 10-bit analog-to-digital conversion - with the ability to sample at speeds of 500K samples per second. Finally, the LM3S5632 microcontroller provides a 24-bit systick timer, 3 32-bit or 6 16-bit general-purpose timers, a watchdog timer, a battery-backed hibernation module with RTC and 256 bytes of non-volatile state-saving memory, a low drop-out voltage regulator so that only one supply voltage is required, brown-out reset, power-on reset controller, and up to 33 GPIOs.

The Stellaris® LM3S5632 microcontroller is based on the ARM® Cortex™-M3 controller core operating at up to 50 MHz, with 128 kB flash, 32 kB SRAM, a 32-ch DMA, and ROM preloaded with the StellarisWare Driver Library and BootLoader. The LM3S5632 also features real-time industrial connectivity, with a CAN controller, USB 2.0 Full Speed Host/Device, an SSI / SPI controller, 2 I2C interfaces, and 2 UARTs. The microcontroller also features intelligent analog capability, including .6 channels of highly accurate 10-bit analog-to-digital conversion - with the ability to sample at speeds of 500K samples per second. Finally, the LM3S5632 microcontroller provides a 24-bit systick timer, 3 32-bit or 6 16-bit general-purpose timers, a watchdog timer, a battery-backed hibernation module with RTC and 256 bytes of non-volatile state-saving memory, a low drop-out voltage regulator so that only one supply voltage is required, brown-out reset, power-on reset controller, and up to 33 GPIOs.

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Technical documentation

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Type Title Date
* Data sheet Stellaris LM3S5632 Microcontroller Data Sheet datasheet (Rev. H) 18 Jul 2014
* Errata Stellaris LM3S Sandstorm-, Fury-, and DustDevil-Class Microcontrollers Errata 26 Jun 2014

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