4-channel 2.3- to 5.5-V I2C/SMBus multiplexer with interrupt & voltage translation
Product details
Parameters
Package | Pins | Size
Features
- 1-of-4 Bidirectional translating switches
- I2C Bus and SMBus compatible
- Four active-low interrupt inputs
- Active-low interrupt output
- Three address pins, allowing up to eight devices on the I2C Bus
- Channel selection via I2C Bus
- Power up with all switch channels deselected
- Low RON switches
- Allows voltage-level translation between 1.8-V, 2.5-V, 3.3-V, and 5-V Buses
- No glitch on power up
- Supports hot insertion
- Low standby current
- Operating power-supply voltage range of 2.3 V to 5.5 V
- 5.5-V Tolerant inputs
- 0 to 400-kHz Clock frequency
- Latch-up performance exceeds 100 mA Per JESD 78
- ESD Protection exceeds JESD 22
- 2000-V Human-body model (A114-A)
- 200-V Machine model (A115-A)
- 1000-V Charged-device model (C101)
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Description
The PCA9544A is a 4-channel, bidirectional translating multiplexer controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. One SCL/SDA pair can be selected at a time, and this is determined by the contents of the programmable control register. Four interrupt inputs (INT3–INT0), one for each of the downstream pairs, are provided. One interrupt output (INT) acts as an AND of the four interrupt inputs.
A power-on reset function puts the registers in their default state and initializes the I2C state machine, with no channel selected.
The pass gates of the switches are constructed such that the VCC pin can be used to limit the maximum high voltage, which will be passed by the PCA9544A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | PCA9544A Low Voltage 4-Channel I2C and SMBus Multiplexer With Interrupt Logic datasheet (Rev. F) | Aug. 05, 2019 |
Application note | I2C Solutions for Hot Swap Applications | Jan. 31, 2020 | |
Application note | I2C Dynamic Addressing | Apr. 25, 2019 | |
Selection guide | Logic Guide (Rev. AB) | Jun. 12, 2017 | |
Application note | Choosing the Correct I2C Device for New Designs | Sep. 07, 2016 | |
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | Dec. 02, 2015 | |
Application note | Understanding the I2C Bus | Jun. 30, 2015 | |
Application note | Maximum Clock Frequency of I2C Bus Using Repeaters | May 15, 2015 | |
Application note | I2C Bus Pull-Up Resistor Calculation | Feb. 13, 2015 | |
Application note | Troubleshooting I2C Bus Protocol | Oct. 19, 2009 | |
Application note | Programming Fun Lights With TI's TCA6507 | Nov. 30, 2007 | |
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | Jul. 08, 2004 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Features
- GUI-based web application
- Exportable designs
- JSON file uploader
- Bill of materials generator
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SOIC (DW) | 20 | View options |
TSSOP (PW) | 20 | View options |
TVSOP (DGV) | 20 | View options |
VQFN (RGY) | 20 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
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Support & training
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