PCI2040

ACTIVE

PCI to DSP bridge controller, compliant to CompactPCI hot swap specification 1.0

Product details

Type Bridge Protocols PCIe Applications PCIe Number of channels 1 Speed (max) (Gbps) 0.033 Supply voltage (V) 3.3, 5 Rating Catalog Operating temperature range (°C) 0 to 70
Type Bridge Protocols PCIe Applications PCIe Number of channels 1 Speed (max) (Gbps) 0.033 Supply voltage (V) 3.3, 5 Rating Catalog Operating temperature range (°C) 0 to 70
LQFP (PGE) 144 484 mm² 22 x 22
  • PCI bus target only, supporting both single-word reads and writes
  • Write transaction posting for improved PCI bus performance
  • Provides glueless interface to host port interface (HPI) port of C54x and/or C6x
  • Up to four DSP devices on HPI
  • Allows direct access to program and control external devices connnected to PCI2040
  • Serial ROM interface for loading subsystem ID and subsystem vendor ID
  • A 16-bit general-purpose bus (GPB) that provides glueless interface to TI JTAG TBC
  • 3.3-V core logic with universal PCI interface compatible with 3.3-V to 5-V signaling environments
  • Advanced submicron, low-power CMOS technology
  • 144-pin device and choice of surface mount packaging: TQFP or 12 mm x 12 mm MicroStar BGA
  • Up to 33 MHz PCI bus frequency
  • PCI bus target only, supporting both single-word reads and writes
  • Write transaction posting for improved PCI bus performance
  • Provides glueless interface to host port interface (HPI) port of C54x and/or C6x
  • Up to four DSP devices on HPI
  • Allows direct access to program and control external devices connnected to PCI2040
  • Serial ROM interface for loading subsystem ID and subsystem vendor ID
  • A 16-bit general-purpose bus (GPB) that provides glueless interface to TI JTAG TBC
  • 3.3-V core logic with universal PCI interface compatible with 3.3-V to 5-V signaling environments
  • Advanced submicron, low-power CMOS technology
  • 144-pin device and choice of surface mount packaging: TQFP or 12 mm x 12 mm MicroStar BGA
  • Up to 33 MHz PCI bus frequency

The TI PCI2040 is a PCI-DSP bridge that provides a glueless connection between the 8-bit host port interface (HPI) port on the TMS320C54X or the 16-bit HPI port on TMS320C6X to the high performance PCI bus. It provides a PCI bus target interface compliant with the PCI Local Bus Specification.

The PCI2040 provides several external interfaces: the PCI bus interface with compact PCI support, the HPI port interface with support for up to four DSPs, a serial ROM interface, a general-purpose input/output interface (GPIOs), and a 16-bit general-purpose bus to provide a glueless interface to TI JTAG test bus controller (TBC). The PCI2040 universal target-only PCI interface is compatible with 3.3-V to 5-V signaling environments.

The PCI2040 interfaces with DSPs via a data bus (HPI port). The PCI2040 also provides a serial ROM interface for preloading several registers including the subsystem ID and subsystem vendor ID.

The PCI2040, compliant with the latest PCI Bus Power Management Interface Specification, provides serveral low-power features that reduce power consumption. Furthermore, an advanced CMOS process achieves low system power consumption.

Unused PCI2040 inputs mus be pulled to a valid logic level using a pullup resistor.

The TI PCI2040 is a PCI-DSP bridge that provides a glueless connection between the 8-bit host port interface (HPI) port on the TMS320C54X or the 16-bit HPI port on TMS320C6X to the high performance PCI bus. It provides a PCI bus target interface compliant with the PCI Local Bus Specification.

The PCI2040 provides several external interfaces: the PCI bus interface with compact PCI support, the HPI port interface with support for up to four DSPs, a serial ROM interface, a general-purpose input/output interface (GPIOs), and a 16-bit general-purpose bus to provide a glueless interface to TI JTAG test bus controller (TBC). The PCI2040 universal target-only PCI interface is compatible with 3.3-V to 5-V signaling environments.

The PCI2040 interfaces with DSPs via a data bus (HPI port). The PCI2040 also provides a serial ROM interface for preloading several registers including the subsystem ID and subsystem vendor ID.

The PCI2040, compliant with the latest PCI Bus Power Management Interface Specification, provides serveral low-power features that reduce power consumption. Furthermore, an advanced CMOS process achieves low system power consumption.

Unused PCI2040 inputs mus be pulled to a valid logic level using a pullup resistor.

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Type Title Date
* Data sheet PCI-DSP Bridge Controller datasheet (Rev. A) 27 Sep 2006
Application note Interfacing the PCI2040 to the TMS320VC5420 DSP 28 Jun 2000

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