Multipoint-LVDS quad differential line driver

SN65MLVD047A

ACTIVE

Product details

Function Driver Protocols M-LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL Output signal M-LVDS Rating Catalog Operating temperature range (C) -40 to 85
Function Driver Protocols M-LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL Output signal M-LVDS Rating Catalog Operating temperature range (C) -40 to 85
SOIC (D) 16 59 mm² 9.9 x 6 TSSOP (PW) 16 22 mm² 4.4 x 5
  • Differential Line Drivers for 30- Loads and Data Rates(1) Up to 200 Mbps, Clock Frequencies up to 100 MHz
  • Supports Multipoint Bus Architectures
  • Meets the Requirements of TIA/EIA-899
  • Operates from a Single 3.3-V Supply
  • Characterized for Operation from -40°C to 85°C
  • 16-Pin SOIC (JEDEC MS-012) and 16-Pin TSSOP (JEDEC MS-153) Packaging
  • APPLICATIONS
    • AdvancedTCA™ (ATCA™) Clock Bus Driver
    • Clock Distribution
    • Backplane or Cabled Multipoint Data Transmission in Telecommunications, Automotive, Industrial, and Other Computer Systems
    • Cellular Base Stations
    • Central-Office and PBX Switching
    • Bridges and Routers
    • Low-Power High-Speed Short-Reach Alternative to TIA/EIA-485

(1) The data rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

AdvancedTCA and ATCA are trademarks of the PCI Industrial Computer Manufacturers Group.

  • Differential Line Drivers for 30- Loads and Data Rates(1) Up to 200 Mbps, Clock Frequencies up to 100 MHz
  • Supports Multipoint Bus Architectures
  • Meets the Requirements of TIA/EIA-899
  • Operates from a Single 3.3-V Supply
  • Characterized for Operation from -40°C to 85°C
  • 16-Pin SOIC (JEDEC MS-012) and 16-Pin TSSOP (JEDEC MS-153) Packaging
  • APPLICATIONS
    • AdvancedTCA™ (ATCA™) Clock Bus Driver
    • Clock Distribution
    • Backplane or Cabled Multipoint Data Transmission in Telecommunications, Automotive, Industrial, and Other Computer Systems
    • Cellular Base Stations
    • Central-Office and PBX Switching
    • Bridges and Routers
    • Low-Power High-Speed Short-Reach Alternative to TIA/EIA-485

(1) The data rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

AdvancedTCA and ATCA are trademarks of the PCI Industrial Computer Manufacturers Group.

The SN65MLVD047A is a quadruple line driver that complies with the TIA/EIA-899 standard, Electrical Characteristics of Multipoint-Low-Voltage Differential Signaling (M-LVDS). The output current of this M-LVDS device has been increased, in comparison to standard LVDS compliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the bus. The effective impedance of a doubly terminated bus can be as low as 30 . The SN65MLVD047A devices allow for multiple drivers to be present on a single bus. SN65MLVD047A drivers are high impedance when disabled or unpowered. Driver edge rate control is incorporated to support operation. The M-LVDS standard allows up to 32 nodes (drivers and/or receivers) to be connected to the same media in a backplane when multiple bus stubs are expected from the main transmission line to interface devices. The SN65MLVD047A provides 9-kV ESD protection on all bus pins.

The SN65MLVD047A is a quadruple line driver that complies with the TIA/EIA-899 standard, Electrical Characteristics of Multipoint-Low-Voltage Differential Signaling (M-LVDS). The output current of this M-LVDS device has been increased, in comparison to standard LVDS compliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the bus. The effective impedance of a doubly terminated bus can be as low as 30 . The SN65MLVD047A devices allow for multiple drivers to be present on a single bus. SN65MLVD047A drivers are high impedance when disabled or unpowered. Driver edge rate control is incorporated to support operation. The M-LVDS standard allows up to 32 nodes (drivers and/or receivers) to be connected to the same media in a backplane when multiple bus stubs are expected from the main transmission line to interface devices. The SN65MLVD047A provides 9-kV ESD protection on all bus pins.

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Technical documentation

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Type Title Date
* Data sheet Multipoint-LVDS Quad Differential Line Driver datasheet (Rev. A) 28 May 2008
Application note How Far, How Fast Can You Operate MLVDS? 06 Aug 2018
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. B) 26 Apr 2013
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 20 Nov 2001

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SOIC (D) 16 View options
TSSOP (PW) 16 View options

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