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Product details

Parameters

Protocols LIN Number of channels (#) 1 Supply voltage (V) 4.5 to 48 Bus fault voltage (V) -60 to 60 Rating Automotive Operating temperature range (C) -40 to 125 Low power mode Sleep, Standby Isolated No open-in-new Find other CAN & LIN transceivers & SBCs

Package | Pins | Size

SOIC (D) 8 19 mm² 4.9 x 3.9 VSON (DRB) 8 9 mm² 3 x 3 open-in-new Find other CAN & LIN transceivers & SBCs

Features

  • AEC-Q100 qualified for automotive applications
  • Compliant to LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A and ISO 17987–4 Electrical physical layer (EPL) specification (See SLLA493)
  • Compliant to SAE J2602-1 LIN Network for Vehicle Applications and SAE J2602-2 LIN Network for Vehicle Applications Conformance Test (See SLLA493)
  • Support for 12-V and 24-V applications
  • Wide input operational voltage range:
    • VSUP range from 4.5 V to 45 V
  • LIN transmit data rate up to 20 kbps
  • LIN receive data rate up to 100 kbps
  • Operating modes:
    • Normal mode
    • Low-power standby mode
    • Low-power sleep mode
  • Low-power mode wake-up support with source recognition:
    • Remote wake-up over the LIN bus
    • Local wake-up via the WAKE pin
    • Local wake-up via EN
  • 5-V tolerant input-level support
  • Integrated 45-kΩ LIN pull-up resistor
  • Control of system-level power using the INH pin
  • Power-up/down glitch-free operation on LIN bus and RXD output
  • Protection features: ±60-V LIN bus fault tolerant, 42-V load dump support, IEC ESD protection, undervoltage protection on VSUP input, TXD dominant state time-out, thermal shutdown, unpowered node or ground disconnection fail-safe at system level
  • Junction temperatures from -40ºC to 150ºC
  • Available in the SOIC (8) and VSON (8) package with improved automated optical inspection (AOI) capability

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Description

The TLIN2021-Q1 is a local interconnect network (LIN) physical layer transceiver. LIN is a low speed universal asynchronous receiver transmitter (UART) communication protocol that supports automotive in-vehicle networking.

The TLIN2021-Q1 transmitter supports data rates up to 20 kbps and the receiver supports data rates up to 100 kbps for faster end-of-line programming. The TLIN2021-Q1 controls the state of the LIN bus via the TXD pin and reports the state of the bus on its open-drain RXD output pin. The device has a current-limited wave-shaping driver to reduce electromagnetic emissions (EME).

The TLIN2021-Q1 is designed to support 24-V applications with a wide input voltage operating range and also supports low-power sleep mode. The device supports wake-up from low-power mode via wake over LIN, the WAKE pin, or the EN pin. The device allows for system-level reductions in battery current consumption by selectively enabling the various power supplies that may be present on a node through the TLIN2021-Q1 INH output pin.

The TLIN2021-Q1 integrates a resistor for LIN slave applications, ESD protection, and fault protection which allow for a reduced amount of external components in the applications. The device prevents back-feed current through LIN to the supply input in case of a ground shift or supply voltage disconnection.

The TLIN2021-Q1 also includes undervoltage detection, temperature shutdown protection, and loss-of-ground protection. In the event of a fault condition, the transmitter is immediately switched off and remains off until the fault condition is removed.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 2
Type Title Date
* Datasheet TLIN2021-Q1 Fault-Protected LIN Transceiver with Inhibit and Wake datasheet (Rev. B) May 18, 2020
* Errata TLIN1021-Q1 and TLIN2021-Q1 Duty Cycle Over VSUP May 22, 2020

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
49
Description
This EVM can be used to evaluate the TLINx021 family of devices. The LIN bus is easily accessed via the J3 and J5 connectora, along with VBAT and GND to make easy connections to real LIN systems. All logic signals are available through headers and test points, and modes are easily transitioned (...)
Features
  • Provides access to LIN bus, TXD, and RXD pins
  • Standby and Sleep mode can be easily accessed and transitioned via headers
  • Silkscreen is labeled thoroughly for easy use
  • Pushbutton circuit connected to WAKE pin for easy device wake from sleep mode
  • Separate header provided to connect pull-up voltage for (...)

Design tools & simulation

SIMULATION MODELS Download
SLLM442.ZIP (84 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options
SON (DRB) 8 View options

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