The AM26C32 device is a quadruple differential line receiver for balanced or unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design specifies that if the inputs are open, the outputs always are high. The AM26C32 devices are manufactured using a BiCMOS process, which is a combination of bipolar and CMOS transistors. This process provides the high voltage and current of bipolar with the low power of CMOS to reduce the power consumption to about one-fifth that of the standard AM26LS32, while maintaining AC and DC performance.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | AM26C32 Quadruple Differential Line Receiver datasheet (Rev. M) | PDF | HTML | Oct 16, 2023 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| TSSOP (PW) | 16 | Ultra Librarian |
| SOIC (D) | 16 | Ultra Librarian |
| SOP (NS) | 16 | Ultra Librarian |
| PDIP (N) | 16 | Ultra Librarian |
| SSOP (DB) | 16 | Ultra Librarian |
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