*FAST is a Registered Trademark of Fairchild Semiconductor Corp.
The RCA CD54/74AC623 and CD54/74ACT623 octal-bus transceivers use the RCA ADVANCED CMOS technology. They are non-inverting, 3-state, bidirectional transceiver-buffers that allow for two-way transmission from "A" bus to "B" bus or "B" bus to "A" bus, depending on the logic levels of the Output Enable (OEAB,(OE)\BA) inputs.
The dual Output Enable provision gives these devices the capability to store data by simultaneously enabling OEAB and (OE)\BA. Each output reinforces its input under these conditions, and when all other data sources to the bus lines are at high-impedance, both sets of bus lines will remian in their last states.
The CD74AC623 is supplied in 20-lead dual-in-line plastic packages E suffix) and in 20-lead small-outline packages (M, M96, and NSR suffixes). The CD74ACT623 is supplied in 20-lead small-outline packages (M96 suffix). Both package types are operable over the following temperature ranges: Commercial (0 to 70°C); Industrial (–40 to +85°C); and Extended Industrial/Military (–55 to +125°C).
The CD54AC623 and CD54ACT623, available in chip form (H suffix), are operable over the -55 to +125°C temperature range.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | Octal-Bus Transceiver, 3-State, Non-Inverting datasheet (Rev. A) | 23 Apr 2002 | |
| Application note | Implications of Slow or Floating CMOS Inputs (Rev. E) | 26 Jul 2021 | ||
| Selection guide | Logic Guide (Rev. AB) | 12 Jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 Dez 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 Jan 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 Jul 2004 | ||
| Application note | Selecting the Right Level Translation Solution (Rev. A) | 22 Jun 2004 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 29 Aug 2002 | ||
| Application note | CMOS Power Consumption and CPD Calculation (Rev. B) | 01 Jun 1997 | ||
| Application note | Designing With Logic (Rev. C) | 01 Jun 1997 | ||
| Application note | Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc | 01 Apr 1996 |
Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.
Das 14-24-LOGIC-EVM-Evaluierungsmodul (EVM) ist für die Unterstützung aller Logikgeräte konzipiert, die sich in einem 14-Pin- bis 24-Pin-D-, DW-, DB-, NS-, PW-, DYY- oder DGV-Gehäuse befinden.
| Gehäuse | Pins | Herunterladen |
|---|---|---|
| SOIC (DW) | 20 | Optionen anzeigen |
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