Produktdetails

Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 40 CON (typ) (pF) 12 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 8 Bandwidth (MHz) 185 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 10 Negative rail supply voltage (max) (V) 0
Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 40 CON (typ) (pF) 12 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 8 Bandwidth (MHz) 185 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 10 Negative rail supply voltage (max) (V) 0
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6
  • Qualified for automotive applications
  • Wide analog input voltage range: ±5V maximum
  • Low ON-resistance:
    • 70Ω typical (VCC – VEE = 4.5V)
    • 40Ω typical (VCC – VEE = 9V)
  • Low crosstalk between switches
  • Fast switching and propagation speeds
  • Break-before-make switching
  • Wide operating temperature range: –40°C to +125°C
  • Operation control voltage: 4.5V to 5.5V
  • Switch voltage: 0V to 10V
  • Direct LSTTL input logic compatibility VIL = 0.8V maximum, VIH = 2V minimum
  • CMOS input compatibility II ≤ 1µA at VOL, VOH
  • Qualified for automotive applications
  • Wide analog input voltage range: ±5V maximum
  • Low ON-resistance:
    • 70Ω typical (VCC – VEE = 4.5V)
    • 40Ω typical (VCC – VEE = 9V)
  • Low crosstalk between switches
  • Fast switching and propagation speeds
  • Break-before-make switching
  • Wide operating temperature range: –40°C to +125°C
  • Operation control voltage: 4.5V to 5.5V
  • Switch voltage: 0V to 10V
  • Direct LSTTL input logic compatibility VIL = 0.8V maximum, VIH = 2V minimum
  • CMOS input compatibility II ≤ 1µA at VOL, VOH

The CDx4HC405x and CDx4HCT405x device is a digitally controlled analog switch that uses silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low-power consumption of standard CMOS integrated circuits.

This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply range (for example, VCC to VEE). It is a bidirectional switch that allows any analog input to be used as an output and vice versa. The switch has low ON resistance and low OFF leakages. In addition, this device has an enable control that, when high, disables all switches to their OFF state.

The CDx4HC405x and CDx4HCT405x device is a digitally controlled analog switch that uses silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low-power consumption of standard CMOS integrated circuits.

This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply range (for example, VCC to VEE). It is a bidirectional switch that allows any analog input to be used as an output and vice versa. The switch has low ON resistance and low OFF leakages. In addition, this device has an enable control that, when high, disables all switches to their OFF state.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet CDx4HC405x, CD4HCT405x High-Speed CMOS Logic Analog Multiplexer and Demultiplexer datasheet (Rev. N) PDF | HTML 10 Apr 2024
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dez 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dez 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 Mai 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design und Entwicklung

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Schnittstellenadapter

LEADED-ADAPTER1 — Oberflächenmontierbarer DIP-Header-Adapter zur schnellen Prüfung der 5-, 8-, 10-, 16- und 24-poligen

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Benutzerhandbuch: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian

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