LM3880

AKTIV

Einfacher Stromversorgungssequenzer, 3 Schienen, mit fester Zeitverzögerung

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Datenblatt

document-pdfAcrobat LM3880 Simple Power Sequencer datasheet (Rev. M) (Englisch) PDF | HTML

LM3880

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Number of sequenced outputs

3

Rating

Catalog

Iq (typ) (mA)

0.025

Time delay (ms)

2, 10, 16, 30, 60, 120

Operating temperature range (°C)

-40 to 125

Number of sequenced outputs

3

Rating

Catalog

Iq (typ) (mA)

0.025

Time delay (ms)

2, 10, 16, 30, 60, 120

Operating temperature range (°C)

-40 to 125

SOT-23 (DBV)

6

8.12 mm² (2.9 mm × 2.8 mm)

Simple solution for sequencing three voltage rails from a single input signal
Easily cascade up to three devices to sequence as many as nine voltage rails
Powerup and powerdown control
Tiny 2.9-mm x 1.6-mm footprint
Low quiescent current: 25 µA
Input voltage range: 2.7 V to 5.5 V
Standard timing options available

Simple solution for sequencing three voltage rails from a single input signal
Easily cascade up to three devices to sequence as many as nine voltage rails
Powerup and powerdown control
Tiny 2.9-mm x 1.6-mm footprint
Low quiescent current: 25 µA
Input voltage range: 2.7 V to 5.5 V
Standard timing options available

The LM3880 simple power supply sequencer offers the easiest method to control powerup sequencing and powerdown sequencing of multiple Independent voltage rails. By staggering the startup sequence, it is possible to avoid latch conditions or large in-rush currents that can affect the reliability of the system.

Available in a 6-pin SOT-23 package, the simple sequencer contains a precision enable pin and three open-drain output flags. The open-drain output flags permit that they can be pulled up to distinct voltage supplies separate from the sequencer V_DD (only if they do not exceed the recommended maximum voltage of 0.3 V greater than V_DD), so as to interface with ICs requiring a range of different enable signals. When the LM3880 is enabled, the three output flags sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags follow a reverse sequence during power down to avoid latch conditions.

EPROM capability allows every delay and sequence to be fully adjustable. Contact Texas Instruments to request a non-standard configuration.

The LM3880 simple power supply sequencer offers the easiest method to control powerup sequencing and powerdown sequencing of multiple Independent voltage rails. By staggering the startup sequence, it is possible to avoid latch conditions or large in-rush currents that can affect the reliability of the system.

Available in a 6-pin SOT-23 package, the simple sequencer contains a precision enable pin and three open-drain output flags. The open-drain output flags permit that they can be pulled up to distinct voltage supplies separate from the sequencer V_DD (only if they do not exceed the recommended maximum voltage of 0.3 V greater than V_DD), so as to interface with ICs requiring a range of different enable signals. When the LM3880 is enabled, the three output flags sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags follow a reverse sequence during power down to avoid latch conditions.

EPROM capability allows every delay and sequence to be fully adjustable. Contact Texas Instruments to request a non-standard configuration.

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Technische Dokumentation

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	Analog Design Journal	Analog Applications Journal 4Q 2014		24.10.2014
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	Anwendungshinweis	LM1771 and LM3880 Based FPGA Power Supply Reference Design (Rev. A)		05.05.2013
	Anwendungshinweis	AN-1603 LM274X Reference Designs (Rev. C)		01.05.2013
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Design und Entwicklung

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Evaluierungsplatine

LM3880EVAL — Stromversorgungssequenzer

The LM3880 evaluation board has been designed to connect directly to the power supplies of an existing system to enable sequencing. Upon enabling the device, the three open drain output flags will rise in sequential order, 1-2-3. Once the part is disabled, the shutdown sequence will occur in (...)

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