SN74LVC1G175-EP

AKTIV

Optimierte Produktpalette (EP) – Einfach-Flipflop (Typ D) mit asynchronem Clear

SN74LVC1G175-EP

AKTIV

Produktdetails

Number of channels 1 Technology family LVC Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 150 IOL (max) (mA) 32 IOH (max) (mA) -32 Supply current (max) (µA) 10 Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating HiRel Enhanced Product
Number of channels 1 Technology family LVC Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 150 IOL (max) (mA) 32 IOH (max) (mA) -32 Supply current (max) (µA) 10 Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating HiRel Enhanced Product
SOT-SC70 (DCK) 6 4.2 mm² (2 mm × 2.1 mm)
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.3 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial Power-Down-Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C)
      Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

(1) Additional temperature ranges available - contact factory

  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.3 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial Power-Down-Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C)
      Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

(1) Additional temperature ranges available - contact factory

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G175 has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock’s (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G175 has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock’s (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt SN74LVC1G175-EP datasheet (Rev. A) 14.12.2010
* Strahlungs- und Zuverlässigkeitsbericht CLVC1G175MDCKREP Reliability Report 30.11.2011
* VID SN74LVC1G175-EP VID V6206633 21.06.2016
Anwendungshinweis Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 15.12.2022

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