SN74LVC2T45-EP

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Datenblatt

document-pdfAcrobat Dual-Bit Dual-Supply Bus Tranceiver With Configurable Voltage Translation datasheet (Rev. C) (Englisch)

SN74LVC2T45-EP

AKTIV

Datenblatt

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Produktdetails

Bits (#)

2

Data rate (max) (Mbps)

420

Topology

Push-Pull

Vin (min) (V)

1.65

Vin (max) (V)

5.5

Vout (min) (V)

1.65

Vout (max) (V)

5.5

Applications

GPIO, I2S

Features

Output enable, Overvoltage tolerant inputs, Partial power down (Ioff)

Prop delay (ns)

7.9

Technology family

LVC

Supply current (max) (mA)

0.004

Rating

HiRel Enhanced Product

Operating temperature range (°C)

-55 to 125

Bits (#)

2

Data rate (max) (Mbps)

420

Topology

Push-Pull

Vin (min) (V)

1.65

Vin (max) (V)

5.5

Vout (min) (V)

1.65

Vout (max) (V)

5.5

Applications

GPIO, I2S

Features

Output enable, Overvoltage tolerant inputs, Partial power down (Ioff)

Prop delay (ns)

7.9

Technology family

LVC

Supply current (max) (mA)

0.004

Rating

HiRel Enhanced Product

Operating temperature range (°C)

-55 to 125

SSOP (DCT)

8

11.8 mm² (2.95 mm × 4 mm)

Available in the Texas Instruments NanoFree™ Package
Fully Configurable Dual-Rail Design Allows Each Port to
Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
V_CC Isolation Feature – If Either V_CCInput Is at GND,
Both Ports Are in the High-Impedance State
DIR Input Circuit Referenced to V_CCA
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Partial-Power-Down Mode Operation
Max Data Rates
- 420 Mbps (3.3-V to 5-V Translation)
- 210 Mbps (Translate to 3.3 V)
- 140 Mbps (Translate to 2.5 V)
- 75 Mbps (Translate to 1.8 V)
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 4000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available Temperature Ranges:
  - –55°C to 125°C
  - –55°C to 150°C
- Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability

NanoFree Is a trademark of Texas Instruments

Available in the Texas Instruments NanoFree™ Package
Fully Configurable Dual-Rail Design Allows Each Port to
Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
V_CC Isolation Feature – If Either V_CCInput Is at GND,
Both Ports Are in the High-Impedance State
DIR Input Circuit Referenced to V_CCA
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Partial-Power-Down Mode Operation
Max Data Rates
- 420 Mbps (3.3-V to 5-V Translation)
- 210 Mbps (Translate to 3.3 V)
- 140 Mbps (Translate to 2.5 V)
- 75 Mbps (Translate to 1.8 V)
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 4000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available Temperature Ranges:
  - –55°C to 125°C
  - –55°C to 150°C
- Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability

NanoFree Is a trademark of Texas Instruments

This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

The SN74LVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess I_CC and I_CCZ.

The SN74LVC2T45 is designed so that the DIR input circuit is supplied by V_CCA.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, both ports are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

The SN74LVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess I_CC and I_CCZ.

The SN74LVC2T45 is designed so that the DIR input circuit is supplied by V_CCA.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, both ports are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

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Technische Dokumentation

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Top-Dokumentation	Typ	Titel	Format-Optionen	Datum
*	Datenblatt	Dual-Bit Dual-Supply Bus Tranceiver With Configurable Voltage Translation datasheet (Rev. C)		22.07.2010
*	Strahlungs- und Zuverlässigkeitsbericht	SN74LVC2T45MDCTTEP Reliability Report		06.09.2013
	Anwendungshinweis	Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators	PDF \| HTML	02.10.2024
	Anwendungshinweis	Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators	PDF \| HTML	12.07.2024
	Anwendungshinweis	Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A)	PDF \| HTML	03.07.2024
	Application brief	Voltage Translation for Rugged High Reliability Applications	PDF \| HTML	20.07.2021
	Auswahlhilfe	Voltage Translation Buying Guide (Rev. A)		15.04.2021

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SN74LVC2T45-EP

Verbessertes Produkt – Bustransceiver, zwei Bit, zwei Spannungsversorgungen, mit konfigurierbarer Sp

SN74LVC2T45-EP

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