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TPS659038-Q1

AKTIV

3,135 V bis 5,25 V, 7-Abwärts- und 11-LDO-PMIC für ARM Cortex-A15-Prozessoren

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NFBGA (ZWS) 169 144 mm² 12 x 12
  • Qualified for Automotive Applications
    • AEC-Q100 Qualified With the Following Results:
      • Temperature Grade 3: –40°C to 85°C
      • ESD Classification:
        • HBM Level 2
        • CDM Level C3
      • Latch-Up Classification:
        • Level IIB for I2C and SPI Terminals
        • Level IIA for all other Terminals
  • Seven Step-Down Switched-Mode Power Supply (SMPS) Regulators:
    • One 0.7 to 1.65 V at 6 A (10-mV Steps)
      • Dual-Phase Configuration With Digital Voltage Scaling (DVS) Control
    • One 0.7 to 1.65 V at 4 A (10-mV Steps)
      • Dual-Phase Configuration With DVS Control
    • One 0.7 to 3.3 V at 3 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • This Regulator can be Combined With the 6 A Resulting in a 9 A Triple-Phase Regulator (DVS Controlled)
    • Two 0.7 to 3.3 V at 2 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • One Regulator With DVS Control, Which can also be Configured as a 3-A Regulator
    • Two 0.7 to 3.3 V at 1 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • One Regulator With DVS Control
    • Output Current Measurement in All Except 1-A SMPS Regulators
    • Differential Remote Sensing (Output and Ground) in Dual-Phase and Triple-Phase Regulators
    • Hardware and Software-Controlled ECO-mode™ up to 5 mA with 15-µA Quiescent Current
    • Short-Circuit Protection
    • Powergood Indication (Voltage and Overcurrent Indication)
    • Internal Soft-Start for In-Rush Current Limitation
    • Ability to synchronize SMPS to External Clock or Internal Fallback Clock With Phase Synchronization
  • Eleven General-Purpose Low Dropout (LDO) Regulators (50-mV Steps):
    • Four 0.9 to 3.3 V at 300 mA With Preregulated Supply
    • Four 0.9 to 3.3 V at 200 mA With Preregulated Supply
    • One 0.9 to 3.3 V at 50 mA With Preregulated Supply
    • One 100-mA USB LDO
    • One Low-Noise LDO 0.9 to 3.3 V up to 100 mA (Low Noise Performance up to 50 mA)
    • Two Additional LDOs for PMU Internal Use
    • Short-Circuit Protection
  • Clock Management 16-MHz Crystal Oscillator and 32-kHz RC Oscillator
    • One Buffered 32-kHz Output
  • Real-Time Clock (RTC) With Alarm Wake-Up Mechanism
  • 12-bit Sigma-Delta General-Purpose Analog-to-Digital-Converter (GPADC) With Three External Input Channels and Six Internal Channels for Self Monitoring
  • Thermal Monitoring
    • High Temperature Warning
    • Thermal Shutdown
  • Control
    • Configurable Power-Up and Power-Down Sequences (One-Time Programmable [OTP])
    • Configurable Sequences Between the SLEEP and ACTIVE States (OTP Programmable)
    • One Dedicated Digital Output Signal (REGEN) that can be Included in the Start-up Sequence
    • Three Digital Output Signals MUXed With GPIO that can be Included in the Start-up Sequence
    • Selectable Control Interface
      • One Serial Peripheral Interface (SPI) for Resource Configurations and DVS Control
      • Two I2C Interfaces. One Dedicated for DVS Control, and a General Purpose I2C Interface for Resource Configuration and DVS Control
  • Undervoltage Lockout
  • System Voltage Range from 3.135 to 5.25 V
  • Package Options
    • 12-mm × 12-mm 169-pin nFBGA with 0,8-mm Ball Pitch
  • Qualified for Automotive Applications
    • AEC-Q100 Qualified With the Following Results:
      • Temperature Grade 3: –40°C to 85°C
      • ESD Classification:
        • HBM Level 2
        • CDM Level C3
      • Latch-Up Classification:
        • Level IIB for I2C and SPI Terminals
        • Level IIA for all other Terminals
  • Seven Step-Down Switched-Mode Power Supply (SMPS) Regulators:
    • One 0.7 to 1.65 V at 6 A (10-mV Steps)
      • Dual-Phase Configuration With Digital Voltage Scaling (DVS) Control
    • One 0.7 to 1.65 V at 4 A (10-mV Steps)
      • Dual-Phase Configuration With DVS Control
    • One 0.7 to 3.3 V at 3 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • This Regulator can be Combined With the 6 A Resulting in a 9 A Triple-Phase Regulator (DVS Controlled)
    • Two 0.7 to 3.3 V at 2 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • One Regulator With DVS Control, Which can also be Configured as a 3-A Regulator
    • Two 0.7 to 3.3 V at 1 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • One Regulator With DVS Control
    • Output Current Measurement in All Except 1-A SMPS Regulators
    • Differential Remote Sensing (Output and Ground) in Dual-Phase and Triple-Phase Regulators
    • Hardware and Software-Controlled ECO-mode™ up to 5 mA with 15-µA Quiescent Current
    • Short-Circuit Protection
    • Powergood Indication (Voltage and Overcurrent Indication)
    • Internal Soft-Start for In-Rush Current Limitation
    • Ability to synchronize SMPS to External Clock or Internal Fallback Clock With Phase Synchronization
  • Eleven General-Purpose Low Dropout (LDO) Regulators (50-mV Steps):
    • Four 0.9 to 3.3 V at 300 mA With Preregulated Supply
    • Four 0.9 to 3.3 V at 200 mA With Preregulated Supply
    • One 0.9 to 3.3 V at 50 mA With Preregulated Supply
    • One 100-mA USB LDO
    • One Low-Noise LDO 0.9 to 3.3 V up to 100 mA (Low Noise Performance up to 50 mA)
    • Two Additional LDOs for PMU Internal Use
    • Short-Circuit Protection
  • Clock Management 16-MHz Crystal Oscillator and 32-kHz RC Oscillator
    • One Buffered 32-kHz Output
  • Real-Time Clock (RTC) With Alarm Wake-Up Mechanism
  • 12-bit Sigma-Delta General-Purpose Analog-to-Digital-Converter (GPADC) With Three External Input Channels and Six Internal Channels for Self Monitoring
  • Thermal Monitoring
    • High Temperature Warning
    • Thermal Shutdown
  • Control
    • Configurable Power-Up and Power-Down Sequences (One-Time Programmable [OTP])
    • Configurable Sequences Between the SLEEP and ACTIVE States (OTP Programmable)
    • One Dedicated Digital Output Signal (REGEN) that can be Included in the Start-up Sequence
    • Three Digital Output Signals MUXed With GPIO that can be Included in the Start-up Sequence
    • Selectable Control Interface
      • One Serial Peripheral Interface (SPI) for Resource Configurations and DVS Control
      • Two I2C Interfaces. One Dedicated for DVS Control, and a General Purpose I2C Interface for Resource Configuration and DVS Control
  • Undervoltage Lockout
  • System Voltage Range from 3.135 to 5.25 V
  • Package Options
    • 12-mm × 12-mm 169-pin nFBGA with 0,8-mm Ball Pitch

The TPS659038-Q1 and TPS659039-Q1 devices are integrated power-management integrated circuits (PMICs) for automotive applications. The device provides seven configurable step-down converters with up to 6 A of output current for memory, processor core, input-output (I/O), or preregulation of LDOs. One of these configurable step-down converters can be combined with another 3-A regulator to allow up to 9 A of output current. All of the step-down converters can synchronize to an external clock source between 1.7 Mhz and 2.7 MHz, or an internal fall back clock at 2.2 MHz. The TPS659038-Q1 device contains 11 LDO regulators while the TPS659039-Q1 device contains six LDO regulators for external use. These LDO regulators can be supplied from either a system supply or a preregulated supply. The power-up and power-down controller is configurable and supports any power-up and power-down sequences (OTP based). The TPS659038-Q1 and TPS659039-Q1 devices include a 32-kHz RC oscillator to sequence all resources during power up and power down. In cases where a fast start up is needed, a 16-MHz crystal oscillator is also included to quickly generate a stable 32-kHz for the system. All LDOs and SMPS converters can be controlled by the SPI or I2C interface, or by power request signals. In addition, voltage scaling registers allow transitioning the SMPS to different voltages by SPI, I2C, or roof and floor control. One dedicated pin in each package can be configured as part of the power-up sequence to control external resources. General-purpose input-output (GPIO) functionality is available and two GPIOs can be configured as part of the power-up sequence to control external resources. Power request signals enable power mode control for power optimization. The device includes a general-purpose (GP) sigma-delta analog-to-digital converter (ADC) with three external input channels. The TPS659038-Q1 and TPS659039-Q1 device is available in a 13-ball × 13-ball nFBGA package with a 0,8-mm pitch.

The TPS659038-Q1 and TPS659039-Q1 devices are integrated power-management integrated circuits (PMICs) for automotive applications. The device provides seven configurable step-down converters with up to 6 A of output current for memory, processor core, input-output (I/O), or preregulation of LDOs. One of these configurable step-down converters can be combined with another 3-A regulator to allow up to 9 A of output current. All of the step-down converters can synchronize to an external clock source between 1.7 Mhz and 2.7 MHz, or an internal fall back clock at 2.2 MHz. The TPS659038-Q1 device contains 11 LDO regulators while the TPS659039-Q1 device contains six LDO regulators for external use. These LDO regulators can be supplied from either a system supply or a preregulated supply. The power-up and power-down controller is configurable and supports any power-up and power-down sequences (OTP based). The TPS659038-Q1 and TPS659039-Q1 devices include a 32-kHz RC oscillator to sequence all resources during power up and power down. In cases where a fast start up is needed, a 16-MHz crystal oscillator is also included to quickly generate a stable 32-kHz for the system. All LDOs and SMPS converters can be controlled by the SPI or I2C interface, or by power request signals. In addition, voltage scaling registers allow transitioning the SMPS to different voltages by SPI, I2C, or roof and floor control. One dedicated pin in each package can be configured as part of the power-up sequence to control external resources. General-purpose input-output (GPIO) functionality is available and two GPIOs can be configured as part of the power-up sequence to control external resources. Power request signals enable power mode control for power optimization. The device includes a general-purpose (GP) sigma-delta analog-to-digital converter (ADC) with three external input channels. The TPS659038-Q1 and TPS659039-Q1 device is available in a 13-ball × 13-ball nFBGA package with a 0,8-mm pitch.

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Selbe Funktionalität wie der verglichene Baustein bei gleicher Anschlussbelegung
TPS659039-Q1 AKTIV 3,135 V bis 5,25 V, 7-Abwärts- und 6-LDO-PMIC für ARM Cortex-A15-Prozessoren This product has the same pinout with fewer LDOs.

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Typ Titel Datum
* Data sheet TPS65903x-Q1 Automotive Power Management Unit (PMU) for Processor datasheet (Rev. L) 06 Feb 2019

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