Home Energiemanagement Gate-Treiber Low-Side-Treiber

UCC27516

AKTIV

4-A/4-A-Einkanal-Gate-Treiber mit 5-V-UVLO und 13-ns-Prop Verzögerung im SON-Gehäuse

Produktdetails

Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
WSON (DRS) 6 9 mm² (3 mm × 3 mm)
  • Low-Cost Gate-Driver Device Offering Superior Replacement
    of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and 4-A Peak-Sink Symmetrical Drive
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (9-ns and 7-ns Typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (Ensures Glitch-Free
    Operation at Power Up and Power Down)
  • TTL and CMOS Compatible Input-Logic Threshold (Independent
    of Supply Voltage)
  • Hysteretic-Logic Thresholds for High-Noise Immunity
  • Dual Input Design (Choice of an Inverting (IN– pin) or
    Noninverting (IN+ Pin) Driver Configuration)
    • Unused Input Pin Can Be Used for Enable or Disable Function
  • Output Held Low When Input Pins Are Floating
  • Input Pin Absolute Maximum Voltage Levels Not Restricted
    by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV (SOT-23) and 6-Pin DRS (3-mm ×
    3-mm WSON With Exposed Thermal Pad) Package Options
  • Low-Cost Gate-Driver Device Offering Superior Replacement
    of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and 4-A Peak-Sink Symmetrical Drive
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (9-ns and 7-ns Typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (Ensures Glitch-Free
    Operation at Power Up and Power Down)
  • TTL and CMOS Compatible Input-Logic Threshold (Independent
    of Supply Voltage)
  • Hysteretic-Logic Thresholds for High-Noise Immunity
  • Dual Input Design (Choice of an Inverting (IN– pin) or
    Noninverting (IN+ Pin) Driver Configuration)
    • Unused Input Pin Can Be Used for Enable or Disable Function
  • Output Held Low When Input Pins Are Floating
  • Input Pin Absolute Maximum Voltage Levels Not Restricted
    by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV (SOT-23) and 6-Pin DRS (3-mm ×
    3-mm WSON With Exposed Thermal Pad) Package Options

The UCC27516 and UCC27517 single-channel, high-speed, low-side gate driver devices can effectively drive MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC27516 and UCC27517 can source and sink high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay, typically 13 ns.

The UCC27516 and UCC27517 provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27516 and UCC27517 are designed to operate over a wide VDD range of 4.5 to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on the VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

The UCC27516 and UCC27517 devices feature a dual-input design which offers flexibility of implementing both inverting (IN– pin) and noninverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For safety purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27516 and UCC27517 devices are based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC27516 and UCC27517 single-channel, high-speed, low-side gate driver devices can effectively drive MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC27516 and UCC27517 can source and sink high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay, typically 13 ns.

The UCC27516 and UCC27517 provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27516 and UCC27517 are designed to operate over a wide VDD range of 4.5 to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on the VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

The UCC27516 and UCC27517 devices feature a dual-input design which offers flexibility of implementing both inverting (IN– pin) and noninverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For safety purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27516 and UCC27517 devices are based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

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UCC27614 AKTIV Einkanaliger Low-Side-Treiber, 10 A/10 A, mit 4 V UVLO, 30 V VDD und geringer Ausbreitungsverzögerun This is a newer single channel driver with higher drive strength and smaller package options.

Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt UCC2751x Single-Channel, High-Speed, Low-Side Gate Driver (With 4-A Peak Source and 4-A Peak Sink) datasheet (Rev. D) PDF | HTML 31.12.2014
Anwendungshinweis Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22.01.2024
Anwendungshinweis Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 08.09.2023
Anwendungshinweis Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 10.11.2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28.02.2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28.02.2020
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18.01.2019
Weitere Dokumente Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29.10.2018
Application brief Enable Function with Unused Differential Input 11.07.2018
Auswahlhilfe Power Management Guide 2018 (Rev. R) 25.06.2018
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 16.03.2018

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Simulationsmodell

UCC27516 PSpice Transient Model (Rev. B)

SLUM310B.ZIP (50 KB) - PSpice-Modell
Unterstützte Produkte und Hardware
Simulationsmodell

UCC27516 Unencrypted PSpice Transient Model

SLUM490.ZIP (2 KB) - PSpice-Modell
Unterstützte Produkte und Hardware
Berechnungstool

SLURB28 — UCC27516 and UCC27517 Schematic Review Template

This can be used to help the design engineer effectively select components and perform the layout to optimize their system for the gate driver.
Unterstützte Produkte und Hardware
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
WSON (DRS) 6 Ultra Librarian

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