ADC081000

ACTIVO

Convertidor A/D de 1 GSPS de 8 bits, alto rendimiento y baja potencia

Detalles del producto

Sample rate (max) (Msps) 1000 Resolution (Bits) 8 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 1700 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 1430 Architecture Folding Interpolating SNR (dB) 48 ENOB (Bits) 7.5 SFDR (dB) 58.5 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 1000 Resolution (Bits) 8 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 1700 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 1430 Architecture Folding Interpolating SNR (dB) 48 ENOB (Bits) 7.5 SFDR (dB) 58.5 Operating temperature range (°C) -40 to 85 Input buffer No
HLQFP (NNB) 128 484 mm² (22 mm × 22 mm)
  • Internal Sample-and-Hold
  • Single +1.9V ±0.1V Operation
  • Adjustable Output Levels
  • Ensured No Missing Codes
  • Low Power Standby Mode
  • Internal Sample-and-Hold
  • Single +1.9V ±0.1V Operation
  • Adjustable Output Levels
  • Ensured No Missing Codes
  • Low Power Standby Mode

The ADC081000 is a low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 1.6 GSPS. Consuming a typical 1.4 Watts at 1 GSPS from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with a 500 MHz input signal and a 1 GHz sample rate while providing a 10-18 B.E.R. Output formatting is offset binary and the LVDS digital outputs are compliant with IEEE 1596.3-1996, with the exception of a reduced common mode voltage of 0.8V.

The converter has a 1:2 demultiplexer that feeds two LVDS buses, reducing the output data rate on each bus to half the sampling rate. The data on these buses are interleaved in time to provide a 500 MHz output rate per bus and a combined output rate of 1 GSPS.

The converter typically consumes less than 10 mW in the Power Down Mode and is available in a 128-lead HLQFP and operates over the industrial (–40°C ≤ TA ≤ +85°C) temperature range.

The ADC081000 is a low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 1.6 GSPS. Consuming a typical 1.4 Watts at 1 GSPS from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with a 500 MHz input signal and a 1 GHz sample rate while providing a 10-18 B.E.R. Output formatting is offset binary and the LVDS digital outputs are compliant with IEEE 1596.3-1996, with the exception of a reduced common mode voltage of 0.8V.

The converter has a 1:2 demultiplexer that feeds two LVDS buses, reducing the output data rate on each bus to half the sampling rate. The data on these buses are interleaved in time to provide a 500 MHz output rate per bus and a combined output rate of 1 GSPS.

The converter typically consumes less than 10 mW in the Power Down Mode and is available in a 128-lead HLQFP and operates over the industrial (–40°C ≤ TA ≤ +85°C) temperature range.

Descargar Ver vídeo con transcripción Video

Documentación técnica

No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 4
Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos ADC081000 High-Performance Low-Power 8-Bit 1-GSPS ADC datasheet (Rev. G) 2/05/2013
Nota sobre la aplicación Generating Precision Clocks for Time- Interleaved ADCs 2/08/2007
Informe Interleaving ADCs for Higher Sample Rates 1/02/2005
Informe Ultra-High Speed ADCs Revolutionize Digital Receiver Design 1/02/2004

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

ADC081000 IBIS Model

SNAM003.ZIP (9 KB) - Modelo IBIS
Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
HLQFP (NNB) 128 Ultra Librarian

Pedidos y calidad

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene alguna pregunta sobre calidad, encapsulados o pedido de productos de TI, consulte el servicio de asistencia de TI. ​​​​​​​​​​​​​​

Videos