ADC14155QML-SP

ACTIVO

Radiation-hardened, QML-V, 100krad, 14 bit, single, 155MSPS ADC

Detalles del producto

Sample rate (max) (Msps) 155 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 1100 Features High Performance Rating Space Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 967 Architecture Pipeline SNR (dB) 70.1 ENOB (Bits) 11.3 SFDR (dB) 82.3 Operating temperature range (°C) -55 to 125 Input buffer No Radiation, TID (typ) (krad) 100 Radiation, SEL (MeV·cm2/mg) 120
Sample rate (max) (Msps) 155 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 1100 Features High Performance Rating Space Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 967 Architecture Pipeline SNR (dB) 70.1 ENOB (Bits) 11.3 SFDR (dB) 82.3 Operating temperature range (°C) -55 to 125 Input buffer No Radiation, TID (typ) (krad) 100 Radiation, SEL (MeV·cm2/mg) 120
CFP (NBA) 48 132.25 mm² (— mm × — mm)
  • 5962R0626201VXC
    • Total Ionizing Dose (TID) 100 krad(Si)
    • Single Event Latch-up 120 MeV-cm2/mg
      (See Radiation Reports)
  • 1.1-GHz Full-Power Bandwidth
  • Internal Sample-and-Hold Circuit
  • Low-Power Consumption
  • Internal Precision 1-V Reference
  • Single-Ended or Differential Clock Modes
  • Data Ready Output Clock
  • Clock Duty Cycle Stabilizer
  • Dual 3.3-V and 1.8-V Supply Operation (±10%)
  • Power-Down Mode
  • Offset Binary or 2’s Complement Output Data Format
  • 48-pin CFP Package (11.5-mm × 11.5-mm, 0.635-mm Pin-Pitch)
  • Key Specifications
    • Resolution 14 Bits
    • Conversion Rate 155 MSPS
    • SNR (fIN = 70 MHz) 70.1 dBFS (typ)
    • SFDR (fIN = 70 MHz) 82.3 dBFS (typ)
    • ENOB (fIN = 70 MHz) 11.3 Bits (typ)
    • Full-Power Bandwidth 1.1 GHz (typ)
    • Power Consumption 967 mW (typ)
  • 5962R0626201VXC
    • Total Ionizing Dose (TID) 100 krad(Si)
    • Single Event Latch-up 120 MeV-cm2/mg
      (See Radiation Reports)
  • 1.1-GHz Full-Power Bandwidth
  • Internal Sample-and-Hold Circuit
  • Low-Power Consumption
  • Internal Precision 1-V Reference
  • Single-Ended or Differential Clock Modes
  • Data Ready Output Clock
  • Clock Duty Cycle Stabilizer
  • Dual 3.3-V and 1.8-V Supply Operation (±10%)
  • Power-Down Mode
  • Offset Binary or 2’s Complement Output Data Format
  • 48-pin CFP Package (11.5-mm × 11.5-mm, 0.635-mm Pin-Pitch)
  • Key Specifications
    • Resolution 14 Bits
    • Conversion Rate 155 MSPS
    • SNR (fIN = 70 MHz) 70.1 dBFS (typ)
    • SFDR (fIN = 70 MHz) 82.3 dBFS (typ)
    • ENOB (fIN = 70 MHz) 11.3 Bits (typ)
    • Full-Power Bandwidth 1.1 GHz (typ)
    • Power Consumption 967 mW (typ)

The ADC14155QML-SP is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 155 MSPS. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC14155 operates from dual 3.3-V and 1.8-V power supplies and consumes 967 mW of power at 155 MSPS.

The separate 1.8-V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature reduces the power consumption to 5 mW with the clock input disabled, while still allowing fast wake-up time to full operation. The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1-V internal voltage reference is provided, or the ADC14155 can be operated with an external reference. The Clock mode (differential versus single-ended) and output data format (offset binary versus 2’s complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC14155QML-SP is available in a 48-lead thermally enhanced multi-layer ceramic quad package and operates over the military temperature range of –55°C to +125°C.

The ADC14155QML-SP is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 155 MSPS. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC14155 operates from dual 3.3-V and 1.8-V power supplies and consumes 967 mW of power at 155 MSPS.

The separate 1.8-V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature reduces the power consumption to 5 mW with the clock input disabled, while still allowing fast wake-up time to full operation. The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1-V internal voltage reference is provided, or the ADC14155 can be operated with an external reference. The Clock mode (differential versus single-ended) and output data format (offset binary versus 2’s complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC14155QML-SP is available in a 48-lead thermally enhanced multi-layer ceramic quad package and operates over the military temperature range of –55°C to +125°C.

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos ADC14155QML-SP, radiation hardened, 14-Bit, 155-MSPS, 1.1-GHz bandwidth A/D converter datasheet (Rev. L) PDF | HTML 13/02/2019
* Informe de radiación y confiabilidad ADC141555W-MLS, DAC121S101WGRQV, ADC08D1000WGFQV TID Report 7/05/2012
* Informe de radiación y confiabilidad ADC14155W-MLS TID Report 7/05/2012
* Informe de radiación y confiabilidad ADC14155W-MLS SEU Report 7/05/2012
* Informe de radiación y confiabilidad ADC14155W-MLS SEL Report 7/05/2012
* Informe de radiación y confiabilidad Analysis of Low Dose Rate Effects on Parasitic Bipolar Structures in CMOS Proces 4/05/2012
* SMD ADC14155QML-SP SMD 5962-06262 29/05/2018
Guía de selección TI Space Products (Rev. L) 27/03/2026
Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML 17/06/2025
Nota sobre la aplicación Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML 10/06/2025
Más documentación TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 20/02/2025
Nota sobre la aplicación Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19/10/2022
Libro electrónico Radiation Handbook for Electronics (Rev. A) 21/05/2019
Nota sobre la aplicación AN-1718 Differential Amplifier Applications Up to 400 MHz (Rev. B) 1/05/2013
Guía del usuario ADC14155: 14-Bit, 155 MSPS Analog to Digital Converter User Guide 21/02/2012

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