Inicio Convertidores de datos Convertidores analógico-digitales (ADC) ADC de alta velocidad (≥ 10 MSPS)
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Convertidores de datos
Convertidores analógico-digitales (ADC)
ADC de alta velocidad (≥ 10 MSPS)

ADS4149

ACTIVO

Convertidor analógico a digital (ADC) de 14 bits y 250 MSPS

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ADC3548 ACTIVO ADC monocanal de 14 bits y 250 MSPS con interfaz LVDS y decimación de hasta 32768x Higher SNR

ADS4149

ACTIVO
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Detalles del producto

Sample rate (max) (Msps) 250 Resolution (Bits) 14 Number of input channels 1 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 800 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 265 Architecture Pipeline SNR (dB) 72.2 ENOB (Bits) 11.5 SFDR (dB) 88 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 250 Resolution (Bits) 14 Number of input channels 1 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 800 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 265 Architecture Pipeline SNR (dB) 72.2 ENOB (Bits) 11.5 SFDR (dB) 88 Operating temperature range (°C) -40 to 85 Input buffer No
VQFN (RGZ) 48 49 mm² 7 x 7
  • Maximum Sample Rate: 250MSPS
  • Ultralow Power with 1.8V Single Supply:
    • 201mW Total Power at 160MSPS
    • 265mW Total Power at 250MSPS
  • High Dynamic Performance:
    • SNR: 70.6dBFS at 170MHz
    • SFDR: 84dBc at 170MHz
  • Dynamic Power Scaling with Sample Rate
  • Output Interface:
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength
      • Standard Swing: 350mV
      • Low Swing: 200mV
      • Default Strength: 100Ω Termination
      • 2x Strength: 50Ω Termination
    • 1.8V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down To 200mVPP
  • Package: QFN-48 (7mm × 7mm)

PowerPAD is a trademark of Texas Instruments Incorporated.
All other trademarks are the property of their respective owners.
  • Maximum Sample Rate: 250MSPS
  • Ultralow Power with 1.8V Single Supply:
    • 201mW Total Power at 160MSPS
    • 265mW Total Power at 250MSPS
  • High Dynamic Performance:
    • SNR: 70.6dBFS at 170MHz
    • SFDR: 84dBc at 170MHz
  • Dynamic Power Scaling with Sample Rate
  • Output Interface:
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength
      • Standard Swing: 350mV
      • Low Swing: 200mV
      • Default Strength: 100Ω Termination
      • 2x Strength: 50Ω Termination
    • 1.8V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down To 200mVPP
  • Package: QFN-48 (7mm × 7mm)

PowerPAD is a trademark of Texas Instruments Incorporated.
All other trademarks are the property of their respective owners.

The ADS412x/4x are a family of 12-bit/14-bit analog-to-digital converters (ADCs) with sampling rates up to 250MSPS. These devices use innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8V supply. The devices are well-suited for multi-carrier, wide bandwidth communications applications.

The ADS412x/4x have fine gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. They include a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.

The ADS412x/4x are available in a compact QFN-48 package and are specified over the industrial temperature range (–40°C to +85°C)

The ADS412x/4x are a family of 12-bit/14-bit analog-to-digital converters (ADCs) with sampling rates up to 250MSPS. These devices use innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8V supply. The devices are well-suited for multi-carrier, wide bandwidth communications applications.

The ADS412x/4x have fine gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. They include a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.

The ADS412x/4x are available in a compact QFN-48 package and are specified over the industrial temperature range (–40°C to +85°C)
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ADS4129 ACTIVO Convertidor analógico a digital (ADC) de 12 bits y 250 MSPS This product is a lower priced, pin-to-pin 12-bit ADC.
ADS41B29 ACTIVO Convertidor analógico a digital (ADC) de 12 bits y 250 MSPS This product is a lower priced, pin-to-pin 12-bit ADC with buffered inputs.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Fecha
* Data sheet 12-/14-Bit, 160/250MSPS, Ultralow-Power ADC datasheet (Rev. G) 20 ene 2011
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 may 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 jul 2013
User guide Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) 10 jul 2012
Application note Band-Pass Filter Design Techniques for High-Speed ADCs 27 feb 2012
Application note High-Speed, Analog-to-Digital Converter Basics 11 ene 2012
Application note Power Supply Design for the ADS41xx (Rev. A) 29 dic 2011
User guide TSW3725 Evaluation Module 25 oct 2011
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 sep 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 abr 2009
Application note CDCE62005 as Clock Solution for High-Speed ADCs 04 sep 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 jun 2008
Application note QFN Layout Guidelines 28 jul 2006

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

ADS4149EVM — Módulo de evaluación del convertidor analógico a digital ADS4149 de 14 bits y 250 MSPS

The ADS4149EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4149 device, an extremely low power 14-bit 250 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible (...)

Guía del usuario: PDF | HTML
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GUI para el módulo de evaluación (EVM)

DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

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Modelo de simulación

ADS414x, ADS412x, ADS58B1x, IBIS MODEL

SBAM091.ZIP (318 KB) - IBIS Model
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Modelo de simulación

ADS414x, ADS412x, ADS58B1x, IBIS MODEL (Rev. A)

SBAM091A.ZIP (318 KB) - IBIS Model
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Herramienta de cálculo

ADC-HARMONIC-CALC — ADC Frequency Calculator Download

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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Herramienta de cálculo

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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Herramienta de diseño

SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® para TI es un entorno de diseño y simulación que ayuda a evaluar la funcionalidad de los circuitos analógicos. Esta completa suite de diseño y simulación utiliza un motor de análisis analógico de Cadence®. Disponible sin ningún costo, PSpice para TI incluye una de las bibliotecas de modelos (...)
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VQFN (RGZ) 48 Ultra Librarian
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Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL)/reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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