ADS5481

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Convertidor analógico a digital (ADC) de 16 bits y 80 MSPS con salidas SFDR y LVDS altas

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Hoja de datos

document-pdfAcrobat 16-Bit, 80/105/135 MSPS High-Speed ADCs datasheet (Rev. C) (Inglés)

ADS5481

ACTIVO

Hoja de datos

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Detalles del producto

Sample rate (max) (Msps)

80

Resolution (Bits)

16

Number of input channels

1

Interface type

Parallel LVDS

Analog input BW (MHz)

125

Features

High Performance

Rating

Catalog

Peak-to-peak input voltage range (V)

3

Power consumption (typ) (mW)

2100

Architecture

Pipeline

SNR (dB)

81

ENOB (Bits)

13

SFDR (dB)

98

Operating temperature range (°C)

-40 to 85

Input buffer

Yes

Sample rate (max) (Msps)

80

Resolution (Bits)

16

Number of input channels

1

Interface type

Parallel LVDS

Analog input BW (MHz)

125

Features

High Performance

Rating

Catalog

Peak-to-peak input voltage range (V)

3

Power consumption (typ) (mW)

2100

Architecture

Pipeline

SNR (dB)

81

ENOB (Bits)

13

SFDR (dB)

98

Operating temperature range (°C)

-40 to 85

Input buffer

Yes

VQFN (RGC)

64

81 mm² (9 mm × 9 mm)

80/105/135-MSPS Sample Rates
16-Bit Resolution
SFDR: 95 dBc at 70 MHz and 135 MSPS
SNR: 78.6 dBFS at 70 MHz and 135 MSPS
Efficient DDR LVDS-Compatible Outputs
Internal Dither Available
Total Power Dissipation: 2.2 W
Power-Down Mode: 70 mW
On-Chip High Impedance Analog Buffer
QFN-64 PowerPAD Package (9 mm × 9 mm Footprint)
Industrial Temperature Range: –40°C to +85°C
APPLICATIONS
- Wireless Infrastructure (Multi-Carrier GSM, WCDMA, LTE)
- Test and Measurement Instrumentation
- Software-Defined Radio
- Data Acquisition
- Power Amplifier Linearization
- Communication Instrumentation
- Radar
- Medical Imaging

All trademarks are the property of their respective owners.

80/105/135-MSPS Sample Rates
16-Bit Resolution
SFDR: 95 dBc at 70 MHz and 135 MSPS
SNR: 78.6 dBFS at 70 MHz and 135 MSPS
Efficient DDR LVDS-Compatible Outputs
Internal Dither Available
Total Power Dissipation: 2.2 W
Power-Down Mode: 70 mW
On-Chip High Impedance Analog Buffer
QFN-64 PowerPAD Package (9 mm × 9 mm Footprint)
Industrial Temperature Range: –40°C to +85°C
APPLICATIONS
- Wireless Infrastructure (Multi-Carrier GSM, WCDMA, LTE)
- Test and Measurement Instrumentation
- Software-Defined Radio
- Data Acquisition
- Power Amplifier Linearization
- Communication Instrumentation
- Radar
- Medical Imaging

All trademarks are the property of their respective owners.

The ADS5481/ADS5482/ADS5483 (ADS548x) is a 16-bit family of analog-to-digital converters (ADCs) that operate from both a 5-V supply and 3.3-V supply while providing LVDS-compatible digital outputs. The ADS548x integrated analog input buffer isolates the internal switching of the onboard track and hold (T&H) from disturbing the signal source while providing a high-impedance input. An internal reference generator is also provided to simplify the system design.

Designed for highest total ENOB, the ADS548x family has outstanding low noise performance and spurious-free dynamic range.

The ADS548x is available in an QFN-64 PowerPAD package. The device is built on Texas Instruments complementary bipolar process (BiCom3) and is specified over the full industrial temperature range (–40°C to +85°C).

The ADS5481/ADS5482/ADS5483 (ADS548x) is a 16-bit family of analog-to-digital converters (ADCs) that operate from both a 5-V supply and 3.3-V supply while providing LVDS-compatible digital outputs. The ADS548x integrated analog input buffer isolates the internal switching of the onboard track and hold (T&H) from disturbing the signal source while providing a high-impedance input. An internal reference generator is also provided to simplify the system design.

Designed for highest total ENOB, the ADS548x family has outstanding low noise performance and spurious-free dynamic range.

The ADS548x is available in an QFN-64 PowerPAD package. The device is built on Texas Instruments complementary bipolar process (BiCom3) and is specified over the full industrial temperature range (–40°C to +85°C).

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Documentación técnica

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Documentación principal	Tipo	Título	Fecha
*	Hoja de datos	16-Bit, 80/105/135 MSPS High-Speed ADCs datasheet (Rev. C)	6/10/2009
	Nota sobre la aplicación	Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)	22/05/2015
	Nota sobre la aplicación	Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)	19/07/2013
	Nota sobre la aplicación	High-Speed, Analog-to-Digital Converter Basics	11/01/2012
	Nota sobre la aplicación	Input Impedance Measurement Using ADC FFT Data	11/01/2011
	Nota sobre la aplicación	Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)	10/09/2010
	Nota sobre la aplicación	Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio	28/04/2009
	Nota sobre la aplicación	CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters	8/06/2008
	Nota sobre la aplicación	Phase Noise Performance and Jitter Cleaning Ability of CDCE72010	2/06/2008
	Nota sobre la aplicación	QFN Layout Guidelines	28/07/2006

Diseño y desarrollo

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