ADS5510
- 11-bit Resolution
- 125-MSPS Sample Rate
- High SNR: 66.3 dBFS at 100 MHz fIN
- High SFDR: 81 dBc at 100 MHz fIN
- 2.3-VPP Differential Input Voltage
- Internal Voltage Reference
- 3.3-V Single-Supply Voltage
- Analog Power Dissipation: 578 mW
- Serial Programming Interface
- TQFP-64 PowerPAD Package
- Pin-Compatible With:
- ADS5500 (14-Bit, 125 MSPS)
- ADS5541 (14-Bit, 105 MSPS)
- ADS5542 (14-Bit, 80 MSPS)
- ADS5520 (12-Bit, 125 MSPS)
- ADS5521 (12-Bit, 105 MSPS)
- ADS5522 (12-Bit, 80 MSPS)
- Recommended Operational Amplifiers: THS3201, THS3202, THS4503, THS4509, THS9001, OPA695, OPA847
- APPLICATIONS
- Wireless Communication
- Communication Receivers
- Base Station Infrastructure
- Test and Measurement Instrumentation
- Single and Multichannel Digital Receivers
- Communication Instrumentation
- Radar
- Infrared
- Video and Imaging
- Medical Equipment
- Wireless Communication
PowerPAD is a trademark of Texas Instruments.
The ADS5510 is a high-performance, 11 bit, 125 MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5510 has excellent power consumption of 578 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.
The ADS5510 is available in 64-pin TQFP PowerPAD package over the industrial temperature range.
Documentación técnica
| Documentación principal | Tipo | Título | Opciones de formato | Fecha |
|---|---|---|---|---|
| * | Data sheet | 11-Bit, 125MSPS Analog-to-Digital Converter datasheet | 17 ene 2007 | |
| Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 22 may 2015 | ||
| Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 19 jul 2013 | ||
| Application note | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 10 sep 2010 | ||
| Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 28 abr 2009 | ||
| Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 08 jun 2008 | ||
| Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 02 jun 2008 |
Diseño y desarrollo
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
Productos y hardware compatibles
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
Productos y hardware compatibles
PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| HTQFP (PAP) | 64 | Ultra Librarian |
Pedidos y calidad
- RoHS
- REACH
- Marcado del dispositivo
- Acabado de plomo/material de la bola
- Clasificación de nivel de sensibilidad a la humedad (MSL)/reflujo máximo
- Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
- Contenido del material
- Resumen de calificaciones
- Monitoreo continuo de confiabilidad
- Lugar de fabricación
- Lugar de ensamblaje
Soporte y capacitación
Foros de TI E2E™ con asistencia técnica de los ingenieros de TI
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