ADS8319

ACTIVO

Convertidor analógico a digital (ADC) SAR de precisión de 16 bits con interfaz SPI

Detalles del producto

Resolution (Bits) 16 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Small Size Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 18 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 93.9 Digital supply (min) (V) 2.375 Digital supply (max) (V) 5.5
Resolution (Bits) 16 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Small Size Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 18 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 93.9 Digital supply (min) (V) 2.375 Digital supply (max) (V) 5.5
VSSOP (DGS) 10 14.7 mm² (3 mm × 4.9 mm) VSON (DRC) 10 9 mm² (3 mm × 3 mm)
  • 500-kHz Sample Rate
  • 16-Bit Resolution
  • Zero Latency at Full Speed
  • Unipolar, Single-Ended Input Range: 0 V to VREF
  • SPI-Compatible Serial Interface With Daisy-Chain Option
  • Excellent Performance:
    • 93.6-dB SNR (Typical) at 10-kHz Input
    • –106-dB THD (Typical) at 10-kHz Input
    • ±1.5-LSB (Maximum) INL
    • ±1-LSB (Maximum) DNL
  • Low Power Dissipation: 18 mW (Typical) at 500 kSPS
  • Power Scales Linearly with Speed: 3.6 mW / 100 kSPS
  • Power Dissipation During Power-Down State: 0.25 µW (Typical)
  • 10-Pin VSSOP and VSON Packages
  • 500-kHz Sample Rate
  • 16-Bit Resolution
  • Zero Latency at Full Speed
  • Unipolar, Single-Ended Input Range: 0 V to VREF
  • SPI-Compatible Serial Interface With Daisy-Chain Option
  • Excellent Performance:
    • 93.6-dB SNR (Typical) at 10-kHz Input
    • –106-dB THD (Typical) at 10-kHz Input
    • ±1.5-LSB (Maximum) INL
    • ±1-LSB (Maximum) DNL
  • Low Power Dissipation: 18 mW (Typical) at 500 kSPS
  • Power Scales Linearly with Speed: 3.6 mW / 100 kSPS
  • Power Dissipation During Power-Down State: 0.25 µW (Typical)
  • 10-Pin VSSOP and VSON Packages

The ADS8319 device is a 16-bit, 500-kSPS, analog-to-digital converter (ADC) that operates with a 2.25-V to 5.5-V external reference. The device includes a capacitor-based, successive-approximation register (SAR) ADC with inherent sample and hold.

The device includes a 50-MHz, SPI-compatible serial interface. The interface is designed to support daisy-chaining or cascading of multiple devices. Furthermore, a Busy Indicator makes synchronizing with the digital host easy.

The device unipolar, single-ended input range supports an input swing of 0 V to +VREF.

Device operation is optimized for very-low power operation and the power consumption directly scales with speed. This feature makes the device attractive for lower-speed applications. The device is available in 10-pin VSSOP and VSON packages.

The ADS8319 device is a 16-bit, 500-kSPS, analog-to-digital converter (ADC) that operates with a 2.25-V to 5.5-V external reference. The device includes a capacitor-based, successive-approximation register (SAR) ADC with inherent sample and hold.

The device includes a 50-MHz, SPI-compatible serial interface. The interface is designed to support daisy-chaining or cascading of multiple devices. Furthermore, a Busy Indicator makes synchronizing with the digital host easy.

The device unipolar, single-ended input range supports an input swing of 0 V to +VREF.

Device operation is optimized for very-low power operation and the power consumption directly scales with speed. This feature makes the device attractive for lower-speed applications. The device is available in 10-pin VSSOP and VSON packages.

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos ADS8319 16-Bit, 500-kSPS, Serial Interface, Micropower, Miniature, SAR Analog-to-Digital Converter datasheet (Rev. C) PDF | HTML 9/12/2016
Circuit design Antialiasing filter circuit design for single-ended ADC input using fixed cutoff (Rev. B) PDF | HTML 24/09/2024
Circuit design Circuit for protecting low-voltage SAR ADC from electrical overstress with minim (Rev. A) PDF | HTML 19/09/2024
Informe Voltage-reference impact on total harmonic distortion 1/08/2016
Más documentación SAR ADCs for PLC Applications PDF | HTML 11/02/2016
Libro electrónico Best of Baker's Best: Precision Data Converters -- SAR ADCs 21/05/2015
Nota sobre la aplicación Determining Minimum Acquisition Times for SAR ADCs, part 2 17/03/2011
Analog Design Journal The IBIS model, Part 2: Determining the total quality of an IBIS model 14/03/2011
Nota sobre la aplicación Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 10/11/2010
Nota sobre la aplicación Low Power Input and Reference Driver Circuit for ADS8318 and ADS8319 24/06/2009

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Soporte de software

SBAC197 — Source Files for SBAA282

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Modelo de simulación

ADS8319 IBIS Model

SBAM087.ZIP (28 KB) - Modelo IBIS
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Modelo de simulación

ADS8319 TINA-TI Spice Model

SLAM206.ZIP (50 KB) - Modelo TINA-TI Spice
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Modelo de simulación

ADS8319 TINA-TI Transient Reference Design

SLAM207.TSC (2625 KB) - Diseño de referencia TINA-TI
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Herramienta de cálculo

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

La calculadora del ingeniero analógico está diseñada para acelerar muchos de los cálculos repetitivos que los ingenieros de diseño de circuitos analógicos utilizan de forma habitual. Esta herramienta para PC proporciona una interfaz gráfica con una lista de varios cálculos comunes que van desde el (...)

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Herramienta de cálculo

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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Herramienta de diseño

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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Pedidos y calidad

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Soporte y capacitación

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